1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 161 unchanged lines hidden (view full) ---

170 uint64_t bits;
171 } val;
172 val.bits = bits;
173 return val.fp;
174}
175
176template <class fpType>
177static inline fpType
178fixDest(FPSCR fpscr, fpType val, fpType op1, fpType op2)
179{
180 int fpClass = std::fpclassify(val);
181 fpType junk = 0.0;
182 if (fpClass == FP_NAN) {
183 const bool single = (sizeof(val) == sizeof(float));
184 const uint64_t qnan = single ? 0x7fc00000 : ULL(0x7ff8000000000000);
185 const bool nan1 = std::isnan(op1);

--- 15 unchanged lines hidden (view full) ---

201 // Turn val into a zero with the correct sign;
202 uint64_t bitMask = ULL(0x1) << (sizeof(fpType) * 8 - 1);
203 val = bitsToFp(fpToBits(val) & bitMask, junk);
204 feraiseexcept(FeUnderflow);
205 }
206 return val;
207}
208
209static inline uint64_t
210vfpFpSToFixed(float val, bool isSigned, bool half, uint8_t imm)
211{
212 fesetround(FeRoundZero);
213 val = val * powf(2.0, imm);
214 __asm__ __volatile__("" : "=m" (val) : "m" (val));
215 feclearexcept(FeAllExceptions);
216 __asm__ __volatile__("" : "=m" (val) : "m" (val));

--- 60 unchanged lines hidden (view full) ---

277 return mask(32);
278 }
279 return (uint32_t)val;
280 }
281 }
282}
283
284static inline float
285vfpUFixedToFpS(uint32_t val, bool half, uint8_t imm)
286{
287 fesetround(FeRoundNearest);
288 if (half)
289 val = (uint16_t)val;
290 float scale = powf(2.0, imm);
291 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
292 feclearexcept(FeAllExceptions);
293 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
294 return val / scale;
295}
296
297static inline float
298vfpSFixedToFpS(int32_t val, bool half, uint8_t imm)
299{
300 fesetround(FeRoundNearest);
301 if (half)
302 val = sext<16>(val & mask(16));
303 float scale = powf(2.0, imm);
304 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
305 feclearexcept(FeAllExceptions);
306 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
307 return val / scale;
308}
309
310static inline uint64_t
311vfpFpDToFixed(double val, bool isSigned, bool half, uint8_t imm)
312{
313 fesetround(FeRoundNearest);
314 val = val * pow(2.0, imm);
315 __asm__ __volatile__("" : "=m" (val) : "m" (val));

--- 62 unchanged lines hidden (view full) ---

378 return mask(32);
379 }
380 return (uint32_t)val;
381 }
382 }
383}
384
385static inline double
386vfpUFixedToFpD(uint32_t val, bool half, uint8_t imm)
387{
388 fesetround(FeRoundNearest);
389 if (half)
390 val = (uint16_t)val;
391 double scale = pow(2.0, imm);
392 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
393 feclearexcept(FeAllExceptions);
394 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
395 return val / scale;
396}
397
398static inline double
399vfpSFixedToFpD(int32_t val, bool half, uint8_t imm)
400{
401 fesetround(FeRoundNearest);
402 if (half)
403 val = sext<16>(val & mask(16));
404 double scale = pow(2.0, imm);
405 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
406 feclearexcept(FeAllExceptions);
407 __asm__ __volatile__("" : "=m" (scale) : "m" (scale));
408 return val / scale;
409}
410
411typedef int VfpSavedState;
412
413static inline VfpSavedState
414prepVfpFpscr(FPSCR fpscr)
415{
416 int roundingMode = fegetround();

--- 154 unchanged lines hidden ---