sve_macromem.hh (14028:44edf7dbe672) | sve_macromem.hh (14091:090449e74135) |
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1/* 2 * Copyright (c) 2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 32 unchanged lines hidden (view full) --- 41#define __ARCH_ARM_SVE_MACROMEM_HH__ 42 43#include "arch/arm/generated/decoder.hh" 44#include "arch/arm/insts/pred_inst.hh" 45 46namespace ArmISA { 47 48template <typename RegElemType, typename MemElemType, | 1/* 2 * Copyright (c) 2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 32 unchanged lines hidden (view full) --- 41#define __ARCH_ARM_SVE_MACROMEM_HH__ 42 43#include "arch/arm/generated/decoder.hh" 44#include "arch/arm/insts/pred_inst.hh" 45 46namespace ArmISA { 47 48template <typename RegElemType, typename MemElemType, |
49 template <typename, typename> class MicroopType> | 49 template <typename, typename> class MicroopType, 50 template <typename> class FirstFaultWritebackMicroopType> |
50class SveIndexedMemVI : public PredMacroOp 51{ 52 protected: 53 IntRegIndex dest; 54 IntRegIndex gp; 55 IntRegIndex base; 56 uint64_t imm; 57 58 public: 59 SveIndexedMemVI(const char *mnem, ExtMachInst machInst, OpClass __opClass, 60 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, | 51class SveIndexedMemVI : public PredMacroOp 52{ 53 protected: 54 IntRegIndex dest; 55 IntRegIndex gp; 56 IntRegIndex base; 57 uint64_t imm; 58 59 public: 60 SveIndexedMemVI(const char *mnem, ExtMachInst machInst, OpClass __opClass, 61 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, |
61 uint64_t _imm) | 62 uint64_t _imm, bool firstFault) |
62 : PredMacroOp(mnem, machInst, __opClass), 63 dest(_dest), gp(_gp), base(_base), imm(_imm) 64 { 65 bool isLoad = (__opClass == MemReadOp); | 63 : PredMacroOp(mnem, machInst, __opClass), 64 dest(_dest), gp(_gp), base(_base), imm(_imm) 65 { 66 bool isLoad = (__opClass == MemReadOp); |
67 assert(!firstFault || isLoad); |
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66 67 int num_elems = ((machInst.sveLen + 1) * 16) / sizeof(RegElemType); 68 69 numMicroops = num_elems; 70 if (isLoad) { | 68 69 int num_elems = ((machInst.sveLen + 1) * 16) / sizeof(RegElemType); 70 71 numMicroops = num_elems; 72 if (isLoad) { |
71 numMicroops++; | 73 if (firstFault) { 74 numMicroops += 2; 75 } else { 76 numMicroops++; 77 } |
72 } 73 74 microOps = new StaticInstPtr[numMicroops]; 75 76 StaticInstPtr *uop = microOps; 77 78 if (isLoad) { 79 // The first microop of a gather load copies the source vector --- 5 unchanged lines hidden (view full) --- 85 mnem, machInst, _base, this); 86 uop++; 87 } 88 89 for (int i = 0; i < num_elems; i++, uop++) { 90 *uop = new MicroopType<RegElemType, MemElemType>( 91 mnem, machInst, __opClass, _dest, _gp, 92 isLoad ? (IntRegIndex) VECREG_UREG0 : _base, _imm, i, | 78 } 79 80 microOps = new StaticInstPtr[numMicroops]; 81 82 StaticInstPtr *uop = microOps; 83 84 if (isLoad) { 85 // The first microop of a gather load copies the source vector --- 5 unchanged lines hidden (view full) --- 91 mnem, machInst, _base, this); 92 uop++; 93 } 94 95 for (int i = 0; i < num_elems; i++, uop++) { 96 *uop = new MicroopType<RegElemType, MemElemType>( 97 mnem, machInst, __opClass, _dest, _gp, 98 isLoad ? (IntRegIndex) VECREG_UREG0 : _base, _imm, i, |
93 num_elems); | 99 num_elems, firstFault); |
94 } 95 | 100 } 101 |
96 --uop; | 102 if (firstFault) { 103 *uop = new FirstFaultWritebackMicroopType<RegElemType>( 104 mnem, machInst, __opClass, num_elems, this); 105 } else { 106 --uop; 107 } 108 |
97 (*uop)->setLastMicroop(); 98 microOps[0]->setFirstMicroop(); 99 100 for (StaticInstPtr *uop = microOps; !(*uop)->isLastMicroop(); uop++) { 101 (*uop)->setDelayedCommit(); 102 } 103 } 104 --- 20 unchanged lines hidden (view full) --- 125 ccprintf(ss, ", #%d", imm * sizeof(MemElemType)); 126 } 127 ccprintf(ss, "]"); 128 return ss.str(); 129 } 130}; 131 132template <typename RegElemType, typename MemElemType, | 109 (*uop)->setLastMicroop(); 110 microOps[0]->setFirstMicroop(); 111 112 for (StaticInstPtr *uop = microOps; !(*uop)->isLastMicroop(); uop++) { 113 (*uop)->setDelayedCommit(); 114 } 115 } 116 --- 20 unchanged lines hidden (view full) --- 137 ccprintf(ss, ", #%d", imm * sizeof(MemElemType)); 138 } 139 ccprintf(ss, "]"); 140 return ss.str(); 141 } 142}; 143 144template <typename RegElemType, typename MemElemType, |
133 template <typename, typename> class MicroopType> | 145 template <typename, typename> class MicroopType, 146 template <typename> class FirstFaultWritebackMicroopType> |
134class SveIndexedMemSV : public PredMacroOp 135{ 136 protected: 137 IntRegIndex dest; 138 IntRegIndex gp; 139 IntRegIndex base; 140 IntRegIndex offset; 141 142 bool offsetIs32; 143 bool offsetIsSigned; 144 bool offsetIsScaled; 145 146 public: 147 SveIndexedMemSV(const char *mnem, ExtMachInst machInst, OpClass __opClass, 148 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 149 IntRegIndex _offset, bool _offsetIs32, | 147class SveIndexedMemSV : public PredMacroOp 148{ 149 protected: 150 IntRegIndex dest; 151 IntRegIndex gp; 152 IntRegIndex base; 153 IntRegIndex offset; 154 155 bool offsetIs32; 156 bool offsetIsSigned; 157 bool offsetIsScaled; 158 159 public: 160 SveIndexedMemSV(const char *mnem, ExtMachInst machInst, OpClass __opClass, 161 IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, 162 IntRegIndex _offset, bool _offsetIs32, |
150 bool _offsetIsSigned, bool _offsetIsScaled) | 163 bool _offsetIsSigned, bool _offsetIsScaled, 164 bool firstFault) |
151 : PredMacroOp(mnem, machInst, __opClass), 152 dest(_dest), gp(_gp), base(_base), offset(_offset), 153 offsetIs32(_offsetIs32), offsetIsSigned(_offsetIsSigned), 154 offsetIsScaled(_offsetIsScaled) 155 { 156 bool isLoad = (__opClass == MemReadOp); | 165 : PredMacroOp(mnem, machInst, __opClass), 166 dest(_dest), gp(_gp), base(_base), offset(_offset), 167 offsetIs32(_offsetIs32), offsetIsSigned(_offsetIsSigned), 168 offsetIsScaled(_offsetIsScaled) 169 { 170 bool isLoad = (__opClass == MemReadOp); |
171 assert(!firstFault || isLoad); |
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157 158 int num_elems = ((machInst.sveLen + 1) * 16) / sizeof(RegElemType); 159 160 numMicroops = num_elems; 161 if (isLoad) { | 172 173 int num_elems = ((machInst.sveLen + 1) * 16) / sizeof(RegElemType); 174 175 numMicroops = num_elems; 176 if (isLoad) { |
162 numMicroops++; | 177 if (firstFault) { 178 numMicroops += 2; 179 } else { 180 numMicroops++; 181 } |
163 } 164 165 microOps = new StaticInstPtr[numMicroops]; 166 167 StaticInstPtr *uop = microOps; 168 169 if (isLoad) { 170 // The first microop of a gather load copies the source vector --- 5 unchanged lines hidden (view full) --- 176 mnem, machInst, _offset, this); 177 uop++; 178 } 179 180 for (int i = 0; i < num_elems; i++, uop++) { 181 *uop = new MicroopType<RegElemType, MemElemType>( 182 mnem, machInst, __opClass, _dest, _gp, _base, 183 isLoad ? (IntRegIndex) VECREG_UREG0 : _offset, _offsetIs32, | 182 } 183 184 microOps = new StaticInstPtr[numMicroops]; 185 186 StaticInstPtr *uop = microOps; 187 188 if (isLoad) { 189 // The first microop of a gather load copies the source vector --- 5 unchanged lines hidden (view full) --- 195 mnem, machInst, _offset, this); 196 uop++; 197 } 198 199 for (int i = 0; i < num_elems; i++, uop++) { 200 *uop = new MicroopType<RegElemType, MemElemType>( 201 mnem, machInst, __opClass, _dest, _gp, _base, 202 isLoad ? (IntRegIndex) VECREG_UREG0 : _offset, _offsetIs32, |
184 _offsetIsSigned, _offsetIsScaled, i, num_elems); | 203 _offsetIsSigned, _offsetIsScaled, i, num_elems, firstFault); |
185 } 186 | 204 } 205 |
187 --uop; | 206 if (firstFault) { 207 *uop = new FirstFaultWritebackMicroopType<RegElemType>( 208 mnem, machInst, __opClass, num_elems, this); 209 } else { 210 --uop; 211 } 212 |
188 (*uop)->setLastMicroop(); 189 microOps[0]->setFirstMicroop(); 190 191 for (StaticInstPtr *uop = microOps; !(*uop)->isLastMicroop(); uop++) { 192 (*uop)->setDelayedCommit(); 193 } 194 } 195 --- 29 unchanged lines hidden --- | 213 (*uop)->setLastMicroop(); 214 microOps[0]->setFirstMicroop(); 215 216 for (StaticInstPtr *uop = microOps; !(*uop)->isLastMicroop(); uop++) { 217 (*uop)->setDelayedCommit(); 218 } 219 } 220 --- 29 unchanged lines hidden --- |