static_inst.hh (7639:8c09b7ff5b57) | static_inst.hh (7640:5286a8a469c5) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 28 unchanged lines hidden (view full) --- 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 */ 42#ifndef __ARCH_ARM_INSTS_STATICINST_HH__ 43#define __ARCH_ARM_INSTS_STATICINST_HH__ 44 | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 28 unchanged lines hidden (view full) --- 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 */ 42#ifndef __ARCH_ARM_INSTS_STATICINST_HH__ 43#define __ARCH_ARM_INSTS_STATICINST_HH__ 44 |
45#include "arch/arm/faults.hh" |
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45#include "base/trace.hh" 46#include "cpu/static_inst.hh" 47 48namespace ArmISA 49{ 50 51class ArmStaticInst : public StaticInst 52{ --- 261 unchanged lines hidden (view full) --- 314 Addr jBit = (ULL(1) << PcJBitShift); 315 Addr tBit = (ULL(1) << PcTBitShift); 316 if (!jBit && !tBit) { 317 setIWNextPC(xc, val); 318 } else { 319 setNextPC(xc, val); 320 } 321 } | 46#include "base/trace.hh" 47#include "cpu/static_inst.hh" 48 49namespace ArmISA 50{ 51 52class ArmStaticInst : public StaticInst 53{ --- 261 unchanged lines hidden (view full) --- 315 Addr jBit = (ULL(1) << PcJBitShift); 316 Addr tBit = (ULL(1) << PcTBitShift); 317 if (!jBit && !tBit) { 318 setIWNextPC(xc, val); 319 } else { 320 setNextPC(xc, val); 321 } 322 } |
323 324 inline Fault 325 disabledFault() const 326 { 327#if FULL_SYSTEM 328 return new UndefinedInstruction(); 329#else 330 return new UndefinedInstruction(machInst, false, mnemonic, true); 331#endif 332 } |
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322}; 323} 324 325#endif //__ARCH_ARM_INSTS_STATICINST_HH__ | 333}; 334} 335 336#endif //__ARCH_ARM_INSTS_STATICINST_HH__ |