static_inst.hh (6253:988a001820f8) static_inst.hh (6254:8abc40611938)
1/* Copyright (c) 2007-2008 The Florida State University
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright

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29#ifndef __ARCH_ARM_INSTS_STATICINST_HH__
30#define __ARCH_ARM_INSTS_STATICINST_HH__
31
32#include "base/trace.hh"
33#include "cpu/static_inst.hh"
34
35namespace ArmISA
36{
1/* Copyright (c) 2007-2008 The Florida State University
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright

--- 20 unchanged lines hidden (view full) ---

29#ifndef __ARCH_ARM_INSTS_STATICINST_HH__
30#define __ARCH_ARM_INSTS_STATICINST_HH__
31
32#include "base/trace.hh"
33#include "cpu/static_inst.hh"
34
35namespace ArmISA
36{
37 class ArmStaticInst : public StaticInst
38 {
39 protected:
37class ArmStaticInst : public StaticInst
38{
39 protected:
40 // Shift Rm by an immediate value
41 int32_t
42 shift_rm_imm(uint32_t base, uint32_t shamt,
43 uint32_t type, uint32_t cfval) const;
40
44
41 // Constructor
42 ArmStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
43 : StaticInst(mnem, _machInst, __opClass)
44 {
45 }
45 // Shift Rm by Rs
46 int32_t
47 shift_rm_rs(uint32_t base, uint32_t shamt,
48 uint32_t type, uint32_t cfval) const;
46
49
47 /// Print a register name for disassembly given the unique
48 /// dependence tag number (FP or int).
49 void printReg(std::ostream &os, int reg) const;
50 // Generate C for a shift by immediate
51 int32_t
52 shift_carry_imm(uint32_t base, uint32_t shamt,
53 uint32_t type, uint32_t cfval) const;
50
54
51 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
52 };
55 // Generate C for a shift by Rs
56 int32_t
57 shift_carry_rs(uint32_t base, uint32_t shamt,
58 uint32_t type, uint32_t cfval) const;
59
60 // Generate the appropriate carry bit for an addition operation
61 int32_t
62 arm_add_carry(int32_t result, int32_t lhs, int32_t rhs) const;
63
64 // Generate the appropriate carry bit for a subtraction operation
65 int32_t
66 arm_sub_carry(int32_t result, int32_t lhs, int32_t rhs) const;
67
68 int32_t
69 arm_add_overflow(int32_t result, int32_t lhs, int32_t rhs) const;
70
71 int32_t
72 arm_sub_overflow(int32_t result, int32_t lhs, int32_t rhs) const;
73
74 // Constructor
75 ArmStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
76 : StaticInst(mnem, _machInst, __opClass)
77 {
78 }
79
80 /// Print a register name for disassembly given the unique
81 /// dependence tag number (FP or int).
82 void printReg(std::ostream &os, int reg) const;
83
84 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
85};
53}
54
55#endif //__ARCH_ARM_INSTS_STATICINST_HH__
86}
87
88#endif //__ARCH_ARM_INSTS_STATICINST_HH__