static_inst.hh (12401:692ba6d84f4b) static_inst.hh (12403:7be05f61abf3)
1/*
2 * Copyright (c) 2010-2013,2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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359
360 inline Fault
361 disabledFault() const
362 {
363 return std::make_shared<UndefinedInstruction>(machInst, false,
364 mnemonic, true);
365 }
366
1/*
2 * Copyright (c) 2010-2013,2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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359
360 inline Fault
361 disabledFault() const
362 {
363 return std::make_shared<UndefinedInstruction>(machInst, false,
364 mnemonic, true);
365 }
366
367 // Utility function used by checkForWFxTrap32 and checkForWFxTrap64
368 // Returns true if processor has to trap a WFI/WFE instruction.
369 bool isWFxTrapping(ThreadContext *tc,
370 ExceptionLevel targetEL, bool isWfe) const;
371
367 /**
368 * Trap an access to Advanced SIMD or FP registers due to access
369 * control bits.
370 *
371 * See aarch64/exceptions/traps/AArch64.AdvSIMDFPAccessTrap in the
372 * ARM ARM psueodcode library.
373 *
374 * @param el Target EL for the trap

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401 * ARM ARM psueodcode library.
402 */
403 Fault checkAdvSIMDOrFPEnabled32(ThreadContext *tc,
404 CPSR cpsr, CPACR cpacr,
405 NSACR nsacr, FPEXC fpexc,
406 bool fpexc_check, bool advsimd) const;
407
408 /**
372 /**
373 * Trap an access to Advanced SIMD or FP registers due to access
374 * control bits.
375 *
376 * See aarch64/exceptions/traps/AArch64.AdvSIMDFPAccessTrap in the
377 * ARM ARM psueodcode library.
378 *
379 * @param el Target EL for the trap

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406 * ARM ARM psueodcode library.
407 */
408 Fault checkAdvSIMDOrFPEnabled32(ThreadContext *tc,
409 CPSR cpsr, CPACR cpacr,
410 NSACR nsacr, FPEXC fpexc,
411 bool fpexc_check, bool advsimd) const;
412
413 /**
414 * Check if WFE/WFI instruction execution in aarch32 should be trapped.
415 *
416 * See aarch32/exceptions/traps/AArch32.checkForWFxTrap in the
417 * ARM ARM psueodcode library.
418 */
419 Fault checkForWFxTrap32(ThreadContext *tc,
420 ExceptionLevel tgtEl, bool isWfe) const;
421
422 /**
423 * Check if WFE/WFI instruction execution in aarch64 should be trapped.
424 *
425 * See aarch64/exceptions/traps/AArch64.checkForWFxTrap in the
426 * ARM ARM psueodcode library.
427 */
428 Fault checkForWFxTrap64(ThreadContext *tc,
429 ExceptionLevel tgtEl, bool isWfe) const;
430
431 /**
432 * WFE/WFI trapping helper function.
433 */
434 Fault trapWFx(ThreadContext *tc, CPSR cpsr, SCR scr, bool isWfe) const;
435
436 /**
409 * Get the new PSTATE from a SPSR register in preparation for an
410 * exception return.
411 *
412 * See shared/functions/system/SetPSTATEFromPSR in the ARM ARM
413 * psueodcode library.
414 */
415 CPSR getPSTATEFromPSR(ThreadContext *tc, CPSR cpsr, CPSR spsr) const;
416

--- 32 unchanged lines hidden --- 		437 * Get the new PSTATE from a SPSR register in preparation for an
438 * exception return.
439 *
440 * See shared/functions/system/SetPSTATEFromPSR in the ARM ARM
441 * psueodcode library.
442 */
443 CPSR getPSTATEFromPSR(ThreadContext *tc, CPSR cpsr, CPSR spsr) const;
444

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