| static_inst.hh (12249:c46cb251ef0b) | static_inst.hh (12399:4b26fa70dfa7) |
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| 1/* 2 * Copyright (c) 2010-2013,2016-2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 409 unchanged lines hidden (view full) --- 418 virtual void 419 annotateFault(ArmFault *fault) {} 420 421 uint8_t 422 getIntWidth() const 423 { 424 return intWidth; 425 } | 1/* 2 * Copyright (c) 2010-2013,2016-2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 409 unchanged lines hidden (view full) --- 418 virtual void 419 annotateFault(ArmFault *fault) {} 420 421 uint8_t 422 getIntWidth() const 423 { 424 return intWidth; 425 } |
| 426 427 /** Returns the byte size of current instruction */ 428 ssize_t 429 instSize() const 430 { 431 return (!machInst.thumb || machInst.bigThumb) ? 4 : 2; 432 } 433 434 /** 435 * Returns the real encoding of the instruction: 436 * the machInst field is in fact always 64 bit wide and 437 * contains some instruction metadata, which means it differs 438 * from the real opcode. 439 */ 440 MachInst 441 encoding() const 442 { 443 return static_cast<MachInst>(mask(instSize() * 8)); 444 } |
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| 426}; 427} 428 429#endif //__ARCH_ARM_INSTS_STATICINST_HH__ | 445}; 446} 447 448#endif //__ARCH_ARM_INSTS_STATICINST_HH__ |