1/* 2 * Copyright (c) 2010-2013, 2016 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 141 unchanged lines hidden (view full) --- 150 if (bits(machInst, 28, 24) == 0x10) 151 intWidth = 64; // Force 64-bit width for ADR/ADRP 152 else 153 intWidth = (aarch64 && bits(machInst, 31)) ? 64 : 32; 154 } 155 156 /// Print a register name for disassembly given the unique 157 /// dependence tag number (FP or int). |
158 void printIntReg(std::ostream &os, RegIndex reg_idx) const; 159 void printFloatReg(std::ostream &os, RegIndex reg_idx) const; 160 void printCCReg(std::ostream &os, RegIndex reg_idx) const; 161 void printMiscReg(std::ostream &os, RegIndex reg_idx) const; |
162 void printMnemonic(std::ostream &os, 163 const std::string &suffix = "", 164 bool withPred = true, 165 bool withCond64 = false, 166 ConditionCode cond64 = COND_UC) const; 167 void printTarget(std::ostream &os, Addr target, 168 const SymbolTable *symtab) const; 169 void printCondition(std::ostream &os, unsigned code, --- 256 unchanged lines hidden --- |