1/*
2 * Copyright (c) 2010-2013,2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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359
360 inline Fault
361 disabledFault() const
362 {
363 return std::make_shared<UndefinedInstruction>(machInst, false,
364 mnemonic, true);
365 }
366
367 /**
368 * Trap an access to Advanced SIMD or FP registers due to access
369 * control bits.
370 *
371 * See aarch64/exceptions/traps/AArch64.AdvSIMDFPAccessTrap in the
372 * ARM ARM psueodcode library.
373 *
374 * @param el Target EL for the trap

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401 * ARM ARM psueodcode library.
402 */
403 Fault checkAdvSIMDOrFPEnabled32(ThreadContext *tc,
404 CPSR cpsr, CPACR cpacr,
405 NSACR nsacr, FPEXC fpexc,
406 bool fpexc_check, bool advsimd) const;
407
408 /**
409 * Get the new PSTATE from a SPSR register in preparation for an
410 * exception return.
411 *
412 * See shared/functions/system/SetPSTATEFromPSR in the ARM ARM
413 * psueodcode library.
414 */
415 CPSR getPSTATEFromPSR(ThreadContext *tc, CPSR cpsr, CPSR spsr) const;
416

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