static_inst.cc (6263:981fc6fba01a) | static_inst.cc (6264:588457e03a81) |
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1/* Copyright (c) 2007-2008 The Florida State University 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright --- 313 unchanged lines hidden (view full) --- 322 if (symtab && symtab->findNearestSymbol(addr, symbol, symbolAddr)) { 323 ccprintf(os, "%s%s", prefix, symbol); 324 if (symbolAddr != addr) 325 ccprintf(os, "+%d", addr - symbolAddr); 326 ccprintf(os, suffix); 327 } 328} 329 | 1/* Copyright (c) 2007-2008 The Florida State University 2 * All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright --- 313 unchanged lines hidden (view full) --- 322 if (symtab && symtab->findNearestSymbol(addr, symbol, symbolAddr)) { 323 ccprintf(os, "%s%s", prefix, symbol); 324 if (symbolAddr != addr) 325 ccprintf(os, "+%d", addr - symbolAddr); 326 ccprintf(os, suffix); 327 } 328} 329 |
330void 331ArmStaticInst::printShiftOperand(std::ostream &os) const 332{ 333 // Shifter operand 334 if (bits((uint32_t)machInst, 25)) { 335 // Immediate form 336 unsigned rotate = machInst.rotate * 2; 337 uint32_t imm = machInst.imm; 338 ccprintf(os, "#%#x", (imm << (32 - rotate)) | (imm >> rotate)); 339 } else { 340 // Register form 341 printReg(os, machInst.rm); 342 343 bool immShift = (machInst.opcode4 == 0); 344 bool done = false; 345 unsigned shiftAmt = (machInst.shiftSize); 346 ArmShiftType type = (ArmShiftType)(uint32_t)machInst.shift; 347 348 if ((type == LSR || type == ASR) && immShift && shiftAmt == 0) 349 shiftAmt = 32; 350 351 switch (type) { 352 case LSL: 353 if (immShift && shiftAmt == 0) { 354 done = true; 355 break; 356 } 357 os << ", LSL"; 358 break; 359 case LSR: 360 os << ", LSR"; 361 break; 362 case ASR: 363 os << ", ASR"; 364 break; 365 case ROR: 366 if (immShift && shiftAmt == 0) { 367 os << ", RRX"; 368 done = true; 369 break; 370 } 371 os << ", ROR"; 372 break; 373 default: 374 panic("Tried to disassemble unrecognized shift type.\n"); 375 } 376 if (!done) { 377 os << " "; 378 if (immShift) 379 os << "#" << shiftAmt; 380 else 381 printReg(os, machInst.rs); 382 } 383 } 384} 385 386void 387ArmStaticInst::printDataInst(std::ostream &os) const 388{ 389 printMnemonic(os, machInst.sField ? "s" : ""); 390 //XXX It would be nice if the decoder figured this all out for us. 391 unsigned opcode = machInst.opcode24_21; 392 bool firstOp = true; 393 394 // Destination 395 // Cmp, cmn, teq, and tst don't have one. 396 if (opcode < 8 || opcode > 0xb) { 397 firstOp = false; 398 printReg(os, machInst.rd); 399 } 400 401 // Source 1. 402 // Mov and Movn don't have one of these. 403 if (opcode != 0xd && opcode != 0xf) { 404 if (!firstOp) 405 os << ", "; 406 firstOp = false; 407 printReg(os, machInst.rn); 408 } 409 410 if (!firstOp) 411 os << ", "; 412 printShiftOperand(os); 413} 414 |
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330std::string 331ArmStaticInst::generateDisassembly(Addr pc, 332 const SymbolTable *symtab) const 333{ 334 std::stringstream ss; 335 printMnemonic(ss); 336 return ss.str(); 337} 338} | 415std::string 416ArmStaticInst::generateDisassembly(Addr pc, 417 const SymbolTable *symtab) const 418{ 419 std::stringstream ss; 420 printMnemonic(ss); 421 return ss.str(); 422} 423} |