static_inst.cc (12109:f29e9c5418aa) static_inst.cc (12403:7be05f61abf3)
1/*
1/*
2 * Copyright (c) 2010-2014, 2016 ARM Limited
2 * Copyright (c) 2010-2014, 2016-2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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730 HCPTR cptrEnCheck = tc->readMiscReg(MISCREG_CPTR_EL3);
731 if (cptrEnCheck.tfp)
732 return advSIMDFPAccessTrap64(EL3);
733 }
734
735 return NoFault;
736}
737
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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730 HCPTR cptrEnCheck = tc->readMiscReg(MISCREG_CPTR_EL3);
731 if (cptrEnCheck.tfp)
732 return advSIMDFPAccessTrap64(EL3);
733 }
734
735 return NoFault;
736}
737
738inline bool
739ArmStaticInst::isWFxTrapping(ThreadContext *tc,
740 ExceptionLevel tgtEl,
741 bool isWfe) const
742{
743 bool trap = false;
744 SCTLR sctlr = ((SCTLR)tc->readMiscReg(MISCREG_SCTLR_EL1));
745 HCR hcr = ((HCR)tc->readMiscReg(MISCREG_HCR_EL2));
746 SCR scr = ((SCR)tc->readMiscReg(MISCREG_SCR_EL3));
738
747
748 switch (tgtEl) {
749 case EL1:
750 trap = isWfe? !sctlr.ntwe : !sctlr.ntwi;
751 break;
752 case EL2:
753 trap = isWfe? hcr.twe : hcr.twi;
754 break;
755 case EL3:
756 trap = isWfe? scr.twe : scr.twi;
757 break;
758 default:
759 break;
760 }
761
762 return trap;
763}
764
765Fault
766ArmStaticInst::checkForWFxTrap32(ThreadContext *tc,
767 ExceptionLevel targetEL,
768 bool isWfe) const
769{
770 // Check if target exception level is implemented.
771 assert(ArmSystem::haveEL(tc, targetEL));
772
773 // Check for routing to AArch64: this happens if the
774 // target exception level (where the trap will be handled)
775 // is using aarch64
776 if (ELIs64(tc, targetEL)) {
777 return checkForWFxTrap64(tc, targetEL, isWfe);
778 }
779
780 // Check if processor needs to trap at selected exception level
781 bool trap = isWFxTrapping(tc, targetEL, isWfe);
782
783 if (trap) {
784 uint32_t iss = isWfe? 0x1E00001 : /* WFE Instruction syndrome */
785 0x1E00000; /* WFI Instruction syndrome */
786 switch (targetEL) {
787 case EL1:
788 return std::make_shared<UndefinedInstruction>(
789 machInst, iss,
790 EC_TRAPPED_WFI_WFE, mnemonic);
791 case EL2:
792 return std::make_shared<HypervisorTrap>(machInst, iss,
793 EC_TRAPPED_WFI_WFE);
794 case EL3:
795 return std::make_shared<SecureMonitorTrap>(machInst, iss,
796 EC_TRAPPED_WFI_WFE);
797 default:
798 panic("Unrecognized Exception Level: %d\n", targetEL);
799 }
800 }
801
802 return NoFault;
803}
804
805Fault
806ArmStaticInst::checkForWFxTrap64(ThreadContext *tc,
807 ExceptionLevel targetEL,
808 bool isWfe) const
809{
810 // Check if target exception level is implemented.
811 assert(ArmSystem::haveEL(tc, targetEL));
812
813 // Check if processor needs to trap at selected exception level
814 bool trap = isWFxTrapping(tc, targetEL, isWfe);
815
816 if (trap) {
817 uint32_t iss = isWfe? 0x1E00001 : /* WFE Instruction syndrome */
818 0x1E00000; /* WFI Instruction syndrome */
819 switch (targetEL) {
820 case EL1:
821 return std::make_shared<SupervisorTrap>(machInst, iss,
822 EC_TRAPPED_WFI_WFE);
823 case EL2:
824 return std::make_shared<HypervisorTrap>(machInst, iss,
825 EC_TRAPPED_WFI_WFE);
826 case EL3:
827 return std::make_shared<SecureMonitorTrap>(machInst, iss,
828 EC_TRAPPED_WFI_WFE);
829 default:
830 panic("Unrecognized Exception Level: %d\n", targetEL);
831 }
832 }
833
834 return NoFault;
835}
836
837Fault
838ArmStaticInst::trapWFx(ThreadContext *tc,
839 CPSR cpsr, SCR scr,
840 bool isWfe) const
841{
842 Fault fault = NoFault;
843 if (cpsr.el == EL0) {
844 fault = checkForWFxTrap32(tc, EL1, isWfe);
845 }
846
847 if ((fault == NoFault) &&
848 ArmSystem::haveEL(tc, EL2) && !inSecureState(scr, cpsr) &&
849 ((cpsr.el == EL0) || (cpsr.el == EL1))) {
850
851 fault = checkForWFxTrap32(tc, EL2, isWfe);
852 }
853
854 if ((fault == NoFault) &&
855 ArmSystem::haveEL(tc, EL3) && cpsr.el != EL3) {
856 fault = checkForWFxTrap32(tc, EL3, isWfe);
857 }
858
859 return fault;
860}
861
739static uint8_t
740getRestoredITBits(ThreadContext *tc, CPSR spsr)
741{
742 // See: shared/functions/system/RestoredITBits in the ARM ARM
743
744 const ExceptionLevel el = opModeToEL((OperatingMode) (uint8_t)spsr.mode);
745 const uint8_t it = itState(spsr);
746

--- 104 unchanged lines hidden --- 		862static uint8_t
863getRestoredITBits(ThreadContext *tc, CPSR spsr)
864{
865 // See: shared/functions/system/RestoredITBits in the ARM ARM
866
867 const ExceptionLevel el = opModeToEL((OperatingMode) (uint8_t)spsr.mode);
868 const uint8_t it = itState(spsr);
869

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