1/* Copyright (c) 2007-2008 The Florida State University
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright

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24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * Authors: Stephen Hines
28 */
29
30#include "arch/arm/insts/static_inst.hh"
31#include "base/condcodes.hh"
32#include "base/cprintf.hh"
33#include "base/loader/symtab.hh"
34
35namespace ArmISA
36{
37// Shift Rm by an immediate value
38int32_t
39ArmStaticInst::shift_rm_imm(uint32_t base, uint32_t shamt,
40 uint32_t type, uint32_t cfval) const

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58 else
59 return (int32_t)base >> shamt;
60 case ROR:
61 if (shamt == 0)
62 return (cfval << 31) | (base >> 1); // RRX
63 else
64 return (base << (32 - shamt)) | (base >> shamt);
65 default:
66 ccprintf(std::cerr, "Unhandled shift type\n");
67 exit(1);
68 break;
69 }
70 return 0;
71}
72
73// Shift Rm by Rs
74int32_t

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97 return (int32_t)base >> shamt;
98 case ROR:
99 shamt = shamt & 0x1f;
100 if (shamt == 0)
101 return base;
102 else
103 return (base << (32 - shamt)) | (base >> shamt);
104 default:
105 ccprintf(std::cerr, "Unhandled shift type\n");
106 exit(1);
107 break;
108 }
109 return 0;
110}
111
112
113// Generate C for a shift by immediate

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137 return (base >> (shamt - 1)) & 1;
138 case ROR:
139 shamt = shamt & 0x1f;
140 if (shamt == 0)
141 return (base & 1); // RRX
142 else
143 return (base >> (shamt - 1)) & 1;
144 default:
145 ccprintf(std::cerr, "Unhandled shift type\n");
146 exit(1);
147 break;
148 }
149 return 0;
150}
151
152
153// Generate C for a shift by Rs

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178 shamt = 32;
179 return (base >> (shamt - 1)) & 1;
180 case ROR:
181 shamt = shamt & 0x1f;
182 if (shamt == 0)
183 shamt = 32;
184 return (base >> (shamt - 1)) & 1;
185 default:
186 ccprintf(std::cerr, "Unhandled shift type\n");
187 exit(1);
188 break;
189 }
190 return 0;
191}
192
193
194// Generate the appropriate carry bit for an addition operation

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