pseudo.hh (10696:b5e5068fcb26) pseudo.hh (11572:9eac6e12c673)
1/*
1/*
2 * Copyright (c) 2014 ARM Limited
2 * Copyright (c) 2014,2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 99 unchanged lines hidden (view full) ---

110 const std::string& _fullMnemonic);
111
112 Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
113
114 std::string
115 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
116};
117
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 99 unchanged lines hidden (view full) ---

110 const std::string& _fullMnemonic);
111
112 Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
113
114 std::string
115 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
116};
117
118class FlushPipeInst : public ArmStaticInst
118/**
119 * Certain mrc/mcr instructions act as nops or flush the pipe based on what
120 * register the instruction is trying to access. This inst/class exists so that
121 * we can still check for hyp traps, as the normal nop instruction
122 * does not.
123 */
124class McrMrcMiscInst : public ArmStaticInst
119{
125{
126 private:
127 uint64_t iss;
128 MiscRegIndex miscReg;
129
120 public:
130 public:
121 FlushPipeInst(const char *_mnemonic, ExtMachInst _machInst);
131 McrMrcMiscInst(const char *_mnemonic, ExtMachInst _machInst,
132 uint64_t _iss, MiscRegIndex _miscReg);
122
123 Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
124
125 std::string
126 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
127
128};
129
133
134 Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
135
136 std::string
137 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
138
139};
140
130
131#endif
141#endif