pseudo.hh (12616:4b463b4dc098) | pseudo.hh (12763:37c243ed1112) |
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1/* 2 * Copyright (c) 2014,2016,2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 147 unchanged lines hidden (view full) --- 156 Fault execute(ExecContext *xc, 157 Trace::InstRecord *traceData) const override; 158 159 std::string generateDisassembly( 160 Addr pc, const SymbolTable *symtab) const override; 161 162}; 163 | 1/* 2 * Copyright (c) 2014,2016,2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 147 unchanged lines hidden (view full) --- 156 Fault execute(ExecContext *xc, 157 Trace::InstRecord *traceData) const override; 158 159 std::string generateDisassembly( 160 Addr pc, const SymbolTable *symtab) const override; 161 162}; 163 |
164/** 165 * This class is modelling instructions which are not going to be 166 * executed since they are flagged as Illegal Execution Instructions 167 * (PSTATE.IL = 1 or CPSR.IL = 1). 168 * The sole purpose of this instruction is to generate an appropriate 169 * fault when executed. 170 */ 171class IllegalExecInst : public ArmStaticInst 172{ 173 public: 174 IllegalExecInst(ExtMachInst _machInst); 175 176 Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const; 177}; 178 |
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164#endif | 179#endif |