pred_inst.hh (7328:f45289e4f2f4) pred_inst.hh (7329:ed9a9d20bc27)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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139 }
140 // Fall through
141 default:
142 panic("Illegal modified SIMD immediate parameters.\n");
143 }
144 return bigData;
145}
146
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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139 }
140 // Fall through
141 default:
142 panic("Illegal modified SIMD immediate parameters.\n");
143 }
144 return bigData;
145}
146
147static inline uint64_t
148vfp_modified_imm(uint8_t data, bool wide)
149{
150 uint64_t bigData = data;
151 uint64_t repData;
152 if (wide) {
153 repData = bits(data, 6) ? 0xFF : 0;
154 bigData = (bits(bigData, 5, 0) << 48) |
155 (repData << 54) | (bits(~bigData, 6) << 62) |
156 (bits(bigData, 7) << 63);
157 } else {
158 repData = bits(data, 6) ? 0x1F : 0;
159 bigData = (bits(bigData, 5, 0) << 19) |
160 (repData << 25) | (bits(~bigData, 6) << 30) |
161 (bits(bigData, 7) << 31);
162 }
163 return bigData;
164}
147
165
166
148/**
149 * Base class for predicated integer operations.
150 */
151class PredOp : public ArmStaticInst
152{
153 protected:
154
155 ConditionCode condCode;

--- 160 unchanged lines hidden --- 		167/**
168 * Base class for predicated integer operations.
169 */
170class PredOp : public ArmStaticInst
171{
172 protected:
173
174 ConditionCode condCode;

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