pred_inst.hh (7140:d2f0418e9390) pred_inst.hh (7142:c63c06703d0f)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 179 unchanged lines hidden (view full) ---

188 // this instruction.
189 bool rotC;
190
191 DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
192 IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) :
193 PredOp(mnem, _machInst, __opClass),
194 dest(_dest), op1(_op1), imm(_imm), rotC(_rotC)
195 {}
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 179 unchanged lines hidden (view full) ---

188 // this instruction.
189 bool rotC;
190
191 DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
192 IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) :
193 PredOp(mnem, _machInst, __opClass),
194 dest(_dest), op1(_op1), imm(_imm), rotC(_rotC)
195 {}
196
197 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
196};
197
198class DataRegOp : public PredOp
199{
200 protected:
201 IntRegIndex dest, op1, op2;
202 int32_t shiftAmt;
203 ArmShiftType shiftType;
204
205 DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
206 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
207 int32_t _shiftAmt, ArmShiftType _shiftType) :
208 PredOp(mnem, _machInst, __opClass),
209 dest(_dest), op1(_op1), op2(_op2),
210 shiftAmt(_shiftAmt), shiftType(_shiftType)
211 {}
198};
199
200class DataRegOp : public PredOp
201{
202 protected:
203 IntRegIndex dest, op1, op2;
204 int32_t shiftAmt;
205 ArmShiftType shiftType;
206
207 DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
208 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
209 int32_t _shiftAmt, ArmShiftType _shiftType) :
210 PredOp(mnem, _machInst, __opClass),
211 dest(_dest), op1(_op1), op2(_op2),
212 shiftAmt(_shiftAmt), shiftType(_shiftType)
213 {}
214
215 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
212};
213
214class DataRegRegOp : public PredOp
215{
216 protected:
217 IntRegIndex dest, op1, op2, shift;
218 ArmShiftType shiftType;
219
220 DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
221 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
222 IntRegIndex _shift, ArmShiftType _shiftType) :
223 PredOp(mnem, _machInst, __opClass),
224 dest(_dest), op1(_op1), op2(_op2), shift(_shift),
225 shiftType(_shiftType)
226 {}
216};
217
218class DataRegRegOp : public PredOp
219{
220 protected:
221 IntRegIndex dest, op1, op2, shift;
222 ArmShiftType shiftType;
223
224 DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
225 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
226 IntRegIndex _shift, ArmShiftType _shiftType) :
227 PredOp(mnem, _machInst, __opClass),
228 dest(_dest), op1(_op1), op2(_op2), shift(_shift),
229 shiftType(_shiftType)
230 {}
231
232 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
227};
228
229/**
230 * Base class for predicated macro-operations.
231 */
232class PredMacroOp : public PredOp
233{
234 protected:

--- 46 unchanged lines hidden --- 		233};
234
235/**
236 * Base class for predicated macro-operations.
237 */
238class PredMacroOp : public PredOp
239{
240 protected:

--- 46 unchanged lines hidden ---