pred_inst.hh (12595:b5a51007feac) | pred_inst.hh (12616:4b463b4dc098) |
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1/* 2 * Copyright (c) 2010, 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 209 unchanged lines hidden (view full) --- 218 imm(machInst.imm), rotated_imm(0), rotated_carry(0), 219 rotate(machInst.rotate << 1) 220 { 221 rotated_imm = rotate_imm(imm, rotate); 222 if (rotate != 0) 223 rotated_carry = bits(rotated_imm, 31); 224 } 225 | 1/* 2 * Copyright (c) 2010, 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 209 unchanged lines hidden (view full) --- 218 imm(machInst.imm), rotated_imm(0), rotated_carry(0), 219 rotate(machInst.rotate << 1) 220 { 221 rotated_imm = rotate_imm(imm, rotate); 222 if (rotate != 0) 223 rotated_carry = bits(rotated_imm, 31); 224 } 225 |
226 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 226 std::string generateDisassembly( 227 Addr pc, const SymbolTable *symtab) const override; |
227}; 228 229/** 230 * Base class for predicated integer operations. 231 */ 232class PredIntOp : public PredOp 233{ 234 protected: 235 236 uint32_t shift_size; 237 uint32_t shift; 238 239 /// Constructor 240 PredIntOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 241 PredOp(mnem, _machInst, __opClass), 242 shift_size(machInst.shiftSize), shift(machInst.shift) 243 { 244 } 245 | 228}; 229 230/** 231 * Base class for predicated integer operations. 232 */ 233class PredIntOp : public PredOp 234{ 235 protected: 236 237 uint32_t shift_size; 238 uint32_t shift; 239 240 /// Constructor 241 PredIntOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 242 PredOp(mnem, _machInst, __opClass), 243 shift_size(machInst.shiftSize), shift(machInst.shift) 244 { 245 } 246 |
246 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 247 std::string generateDisassembly( 248 Addr pc, const SymbolTable *symtab) const override; |
247}; 248 249class DataImmOp : public PredOp 250{ 251 protected: 252 IntRegIndex dest, op1; 253 uint32_t imm; 254 // Whether the carry flag should be modified if that's an option for 255 // this instruction. 256 bool rotC; 257 258 DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 259 IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) : 260 PredOp(mnem, _machInst, __opClass), 261 dest(_dest), op1(_op1), imm(_imm), rotC(_rotC) 262 {} 263 | 249}; 250 251class DataImmOp : public PredOp 252{ 253 protected: 254 IntRegIndex dest, op1; 255 uint32_t imm; 256 // Whether the carry flag should be modified if that's an option for 257 // this instruction. 258 bool rotC; 259 260 DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 261 IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) : 262 PredOp(mnem, _machInst, __opClass), 263 dest(_dest), op1(_op1), imm(_imm), rotC(_rotC) 264 {} 265 |
264 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 266 std::string generateDisassembly( 267 Addr pc, const SymbolTable *symtab) const override; |
265}; 266 267class DataRegOp : public PredOp 268{ 269 protected: 270 IntRegIndex dest, op1, op2; 271 int32_t shiftAmt; 272 ArmShiftType shiftType; 273 274 DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 275 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 276 int32_t _shiftAmt, ArmShiftType _shiftType) : 277 PredOp(mnem, _machInst, __opClass), 278 dest(_dest), op1(_op1), op2(_op2), 279 shiftAmt(_shiftAmt), shiftType(_shiftType) 280 {} 281 | 268}; 269 270class DataRegOp : public PredOp 271{ 272 protected: 273 IntRegIndex dest, op1, op2; 274 int32_t shiftAmt; 275 ArmShiftType shiftType; 276 277 DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 278 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 279 int32_t _shiftAmt, ArmShiftType _shiftType) : 280 PredOp(mnem, _machInst, __opClass), 281 dest(_dest), op1(_op1), op2(_op2), 282 shiftAmt(_shiftAmt), shiftType(_shiftType) 283 {} 284 |
282 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 285 std::string generateDisassembly( 286 Addr pc, const SymbolTable *symtab) const override; |
283}; 284 285class DataRegRegOp : public PredOp 286{ 287 protected: 288 IntRegIndex dest, op1, op2, shift; 289 ArmShiftType shiftType; 290 291 DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 292 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 293 IntRegIndex _shift, ArmShiftType _shiftType) : 294 PredOp(mnem, _machInst, __opClass), 295 dest(_dest), op1(_op1), op2(_op2), shift(_shift), 296 shiftType(_shiftType) 297 {} 298 | 287}; 288 289class DataRegRegOp : public PredOp 290{ 291 protected: 292 IntRegIndex dest, op1, op2, shift; 293 ArmShiftType shiftType; 294 295 DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 296 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 297 IntRegIndex _shift, ArmShiftType _shiftType) : 298 PredOp(mnem, _machInst, __opClass), 299 dest(_dest), op1(_op1), op2(_op2), shift(_shift), 300 shiftType(_shiftType) 301 {} 302 |
299 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 303 std::string generateDisassembly( 304 Addr pc, const SymbolTable *symtab) const override; |
300}; 301 302/** 303 * Base class for predicated macro-operations. 304 */ 305class PredMacroOp : public PredOp 306{ 307 protected: --- 14 unchanged lines hidden (view full) --- 322 323 ~PredMacroOp() 324 { 325 if (numMicroops) 326 delete [] microOps; 327 } 328 329 StaticInstPtr | 305}; 306 307/** 308 * Base class for predicated macro-operations. 309 */ 310class PredMacroOp : public PredOp 311{ 312 protected: --- 14 unchanged lines hidden (view full) --- 327 328 ~PredMacroOp() 329 { 330 if (numMicroops) 331 delete [] microOps; 332 } 333 334 StaticInstPtr |
330 fetchMicroop(MicroPC microPC) const | 335 fetchMicroop(MicroPC microPC) const override |
331 { 332 assert(microPC < numMicroops); 333 return microOps[microPC]; 334 } 335 336 Fault | 336 { 337 assert(microPC < numMicroops); 338 return microOps[microPC]; 339 } 340 341 Fault |
337 execute(ExecContext *, Trace::InstRecord *) const | 342 execute(ExecContext *, Trace::InstRecord *) const override |
338 { 339 panic("Execute method called when it shouldn't!"); 340 } 341 | 343 { 344 panic("Execute method called when it shouldn't!"); 345 } 346 |
342 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 347 std::string generateDisassembly( 348 Addr pc, const SymbolTable *symtab) const override; |
343}; 344 345/** 346 * Base class for predicated micro-operations. 347 */ 348class PredMicroop : public PredOp 349{ 350 /// Constructor --- 18 unchanged lines hidden --- | 349}; 350 351/** 352 * Base class for predicated micro-operations. 353 */ 354class PredMicroop : public PredOp 355{ 356 /// Constructor --- 18 unchanged lines hidden --- |