1/* Copyright (c) 2007-2008 The Florida State University
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution;
11 * neither the name of the copyright holders nor the names of its
12 * contributors may be used to endorse or promote products derived from
13 * this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * Authors: Stephen Hines
28 */
29#ifndef __ARCH_ARM_INSTS_PREDINST_HH__
30#define __ARCH_ARM_INSTS_PREDINST_HH__
31
32#include "arch/arm/insts/static_inst.hh"
33#include "base/trace.hh"
34
35namespace ArmISA
36{
37static inline uint32_t
38rotate_imm(uint32_t immValue, int rotateValue)
39{
40 return ((immValue >> (rotateValue & 31)) |
41 (immValue << (32 - (rotateValue & 31))));
42}
43
44/**
45 * Base class for predicated integer operations.
46 */
47class PredOp : public ArmStaticInst
48{
49 protected:
50
51 ConditionCode condCode;
52
53 /// Constructor
54 PredOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
55 ArmStaticInst(mnem, _machInst, __opClass),
56 condCode((ConditionCode)(unsigned)machInst.condCode)
57 {
58 }
59
60 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
61};
62
63/**
64 * Base class for predicated immediate operations.
65 */
66class PredImmOp : public PredOp
67{
68 protected:
69
70 uint32_t imm;
71 uint32_t rotate;
72 uint32_t rotated_imm;
73 uint32_t rotated_carry;
74
75 /// Constructor
76 PredImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
77 PredOp(mnem, _machInst, __opClass),
78 imm(machInst.imm), rotate(machInst.rotate << 1),
79 rotated_imm(0), rotated_carry(0)
80 {
81 rotated_imm = rotate_imm(imm, rotate);
82 if (rotate != 0)
83 rotated_carry = (rotated_imm >> 31) & 1;
84 }
85};
86
87/**
88 * Base class for predicated integer operations.
89 */
90class PredIntOp : public PredOp
91{
92 protected:
93
94 uint32_t shift_size;
95 uint32_t shift;
96
97 /// Constructor
98 PredIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
99 PredOp(mnem, _machInst, __opClass),
100 shift_size(machInst.shiftSize), shift(machInst.shift)
101 {
102 }
103};
104
105/**
106 * Base class for predicated macro-operations.
107 */
108class PredMacroOp : public PredOp
109{
110 protected:
111
112 uint32_t numMicroops;
113 StaticInstPtr * microOps;
114
115 /// Constructor
116 PredMacroOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
117 PredOp(mnem, _machInst, __opClass),
118 numMicroops(0)
119 {
120 // We rely on the subclasses of this object to handle the
121 // initialization of the micro-operations, since they are
122 // all of variable length
123 flags[IsMacroop] = true;
124 }
125
126 ~PredMacroOp()
127 {
128 if (numMicroops)
129 delete [] microOps;
130 }
131
132 StaticInstPtr
133 fetchMicroop(MicroPC microPC)
134 {
135 assert(microPC < numMicroops);
136 return microOps[microPC];
137 }
138
139 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
140};
141
142/**
143 * Base class for predicated micro-operations.
144 */
145class PredMicroop : public PredOp
146{
147 /// Constructor
148 PredMicroop(const char *mnem, MachInst _machInst, OpClass __opClass) :
149 PredOp(mnem, _machInst, __opClass)
150 {
151 flags[IsMicroop] = true;
152 }
153};
154}
155
156#endif //__ARCH_ARM_INSTS_PREDINST_HH__