1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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57 (IntRegIndex)(uint32_t)machInst.rm,
58 (IntRegIndex)(uint32_t)machInst.rs,
59 machInst.shiftSize, (ArmShiftType)(uint32_t)machInst.shift,
60 imm);
61 return ss.str();
62}
63
64std::string
65PredImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
66{
67 std::stringstream ss;
68 printDataInst(ss, true, machInst.opcode4 == 0, machInst.sField,
69 (IntRegIndex)(uint32_t)machInst.rd,
70 (IntRegIndex)(uint32_t)machInst.rn,
71 (IntRegIndex)(uint32_t)machInst.rm,
72 (IntRegIndex)(uint32_t)machInst.rs,
73 machInst.shiftSize, (ArmShiftType)(uint32_t)machInst.shift,
74 imm);
75 return ss.str();

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