misc64.hh (12280:a44a2326a02b) misc64.hh (12538:001ad6b1e592)
1/*
1/*
2 * Copyright (c) 2011-2013,2017 ARM Limited
2 * Copyright (c) 2011-2013,2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_ARM_INSTS_MISC64_HH__
41#define __ARCH_ARM_INSTS_MISC64_HH__
42
43#include "arch/arm/insts/static_inst.hh"
44
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 26 unchanged lines hidden (view full) ---

37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_ARM_INSTS_MISC64_HH__
41#define __ARCH_ARM_INSTS_MISC64_HH__
42
43#include "arch/arm/insts/static_inst.hh"
44
45class ImmOp64 : public ArmStaticInst
46{
47 protected:
48 uint64_t imm;
49
50 ImmOp64(const char *mnem, ExtMachInst _machInst,
51 OpClass __opClass, uint64_t _imm) :
52 ArmStaticInst(mnem, _machInst, __opClass), imm(_imm)
53 {}
54
55 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
56};
57
45class RegRegImmImmOp64 : public ArmStaticInst
46{
47 protected:
48 IntRegIndex dest;
49 IntRegIndex op1;
50 uint64_t imm1;
51 uint64_t imm2;
52

--- 74 unchanged lines hidden --- 		58class RegRegImmImmOp64 : public ArmStaticInst
59{
60 protected:
61 IntRegIndex dest;
62 IntRegIndex op1;
63 uint64_t imm1;
64 uint64_t imm2;
65

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