misc64.hh (10037:5cac77888310) | misc64.hh (12280:a44a2326a02b) |
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1/* | 1/* |
2 * Copyright (c) 2011-2013 ARM Limited | 2 * Copyright (c) 2011-2013,2017 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 73 unchanged lines hidden (view full) --- 84 85 UnknownOp64(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 86 ArmStaticInst(mnem, _machInst, __opClass) 87 {} 88 89 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 90}; 91 | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 73 unchanged lines hidden (view full) --- 84 85 UnknownOp64(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 86 ArmStaticInst(mnem, _machInst, __opClass) 87 {} 88 89 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 90}; 91 |
92class MiscRegRegImmOp64 : public ArmStaticInst 93{ 94 protected: 95 MiscRegIndex dest; 96 IntRegIndex op1; 97 uint32_t imm; 98 99 MiscRegRegImmOp64(const char *mnem, ExtMachInst _machInst, 100 OpClass __opClass, MiscRegIndex _dest, 101 IntRegIndex _op1, uint32_t _imm) : 102 ArmStaticInst(mnem, _machInst, __opClass), 103 dest(_dest), op1(_op1), imm(_imm) 104 {} 105 106 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 107}; 108 109class RegMiscRegImmOp64 : public ArmStaticInst 110{ 111 protected: 112 IntRegIndex dest; 113 MiscRegIndex op1; 114 uint32_t imm; 115 116 RegMiscRegImmOp64(const char *mnem, ExtMachInst _machInst, 117 OpClass __opClass, IntRegIndex _dest, 118 MiscRegIndex _op1, uint32_t _imm) : 119 ArmStaticInst(mnem, _machInst, __opClass), 120 dest(_dest), op1(_op1), imm(_imm) 121 {} 122 123 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 124}; 125 |
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92#endif | 126#endif |