misc.hh (12504:6a6d80495bd6) | misc.hh (12616:4b463b4dc098) |
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1/* 2 * Copyright (c) 2010, 2012-2013, 2017-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 38 unchanged lines hidden (view full) --- 47 protected: 48 IntRegIndex dest; 49 50 MrsOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 51 IntRegIndex _dest) : 52 PredOp(mnem, _machInst, __opClass), dest(_dest) 53 {} 54 | 1/* 2 * Copyright (c) 2010, 2012-2013, 2017-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 38 unchanged lines hidden (view full) --- 47 protected: 48 IntRegIndex dest; 49 50 MrsOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 51 IntRegIndex _dest) : 52 PredOp(mnem, _machInst, __opClass), dest(_dest) 53 {} 54 |
55 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 55 std::string generateDisassembly( 56 Addr pc, const SymbolTable *symtab) const override; |
56}; 57 58class MsrBase : public PredOp 59{ 60 protected: 61 uint8_t byteMask; 62 63 MsrBase(const char *mnem, ExtMachInst _machInst, OpClass __opClass, --- 9 unchanged lines hidden (view full) --- 73 protected: 74 uint32_t imm; 75 76 MsrImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 77 uint32_t _imm, uint8_t _byteMask) : 78 MsrBase(mnem, _machInst, __opClass, _byteMask), imm(_imm) 79 {} 80 | 57}; 58 59class MsrBase : public PredOp 60{ 61 protected: 62 uint8_t byteMask; 63 64 MsrBase(const char *mnem, ExtMachInst _machInst, OpClass __opClass, --- 9 unchanged lines hidden (view full) --- 74 protected: 75 uint32_t imm; 76 77 MsrImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 78 uint32_t _imm, uint8_t _byteMask) : 79 MsrBase(mnem, _machInst, __opClass, _byteMask), imm(_imm) 80 {} 81 |
81 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 82 std::string generateDisassembly( 83 Addr pc, const SymbolTable *symtab) const override; |
82}; 83 84class MsrRegOp : public MsrBase 85{ 86 protected: 87 IntRegIndex op1; 88 89 MsrRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 90 IntRegIndex _op1, uint8_t _byteMask) : 91 MsrBase(mnem, _machInst, __opClass, _byteMask), op1(_op1) 92 {} 93 | 84}; 85 86class MsrRegOp : public MsrBase 87{ 88 protected: 89 IntRegIndex op1; 90 91 MsrRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 92 IntRegIndex _op1, uint8_t _byteMask) : 93 MsrBase(mnem, _machInst, __opClass, _byteMask), op1(_op1) 94 {} 95 |
94 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 96 std::string generateDisassembly( 97 Addr pc, const SymbolTable *symtab) const override; |
95}; 96 97class MrrcOp : public PredOp 98{ 99 protected: 100 MiscRegIndex op1; 101 IntRegIndex dest; 102 IntRegIndex dest2; 103 uint32_t imm; 104 105 MrrcOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 106 MiscRegIndex _op1, IntRegIndex _dest, IntRegIndex _dest2, 107 uint32_t _imm) : 108 PredOp(mnem, _machInst, __opClass), op1(_op1), dest(_dest), 109 dest2(_dest2), imm(_imm) 110 {} 111 | 98}; 99 100class MrrcOp : public PredOp 101{ 102 protected: 103 MiscRegIndex op1; 104 IntRegIndex dest; 105 IntRegIndex dest2; 106 uint32_t imm; 107 108 MrrcOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 109 MiscRegIndex _op1, IntRegIndex _dest, IntRegIndex _dest2, 110 uint32_t _imm) : 111 PredOp(mnem, _machInst, __opClass), op1(_op1), dest(_dest), 112 dest2(_dest2), imm(_imm) 113 {} 114 |
112 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 115 std::string generateDisassembly( 116 Addr pc, const SymbolTable *symtab) const override; |
113}; 114 115class McrrOp : public PredOp 116{ 117 protected: 118 IntRegIndex op1; 119 IntRegIndex op2; 120 MiscRegIndex dest; 121 uint32_t imm; 122 123 McrrOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 124 IntRegIndex _op1, IntRegIndex _op2, MiscRegIndex _dest, 125 uint32_t _imm) : 126 PredOp(mnem, _machInst, __opClass), op1(_op1), op2(_op2), 127 dest(_dest), imm(_imm) 128 {} 129 | 117}; 118 119class McrrOp : public PredOp 120{ 121 protected: 122 IntRegIndex op1; 123 IntRegIndex op2; 124 MiscRegIndex dest; 125 uint32_t imm; 126 127 McrrOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 128 IntRegIndex _op1, IntRegIndex _op2, MiscRegIndex _dest, 129 uint32_t _imm) : 130 PredOp(mnem, _machInst, __opClass), op1(_op1), op2(_op2), 131 dest(_dest), imm(_imm) 132 {} 133 |
130 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 134 std::string generateDisassembly( 135 Addr pc, const SymbolTable *symtab) const override; |
131}; 132 133class ImmOp : public PredOp 134{ 135 protected: 136 uint64_t imm; 137 138 ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 139 uint64_t _imm) : 140 PredOp(mnem, _machInst, __opClass), imm(_imm) 141 {} 142 | 136}; 137 138class ImmOp : public PredOp 139{ 140 protected: 141 uint64_t imm; 142 143 ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 144 uint64_t _imm) : 145 PredOp(mnem, _machInst, __opClass), imm(_imm) 146 {} 147 |
143 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 148 std::string generateDisassembly( 149 Addr pc, const SymbolTable *symtab) const override; |
144}; 145 146class RegImmOp : public PredOp 147{ 148 protected: 149 IntRegIndex dest; 150 uint64_t imm; 151 152 RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 153 IntRegIndex _dest, uint64_t _imm) : 154 PredOp(mnem, _machInst, __opClass), dest(_dest), imm(_imm) 155 {} 156 | 150}; 151 152class RegImmOp : public PredOp 153{ 154 protected: 155 IntRegIndex dest; 156 uint64_t imm; 157 158 RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 159 IntRegIndex _dest, uint64_t _imm) : 160 PredOp(mnem, _machInst, __opClass), dest(_dest), imm(_imm) 161 {} 162 |
157 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 163 std::string generateDisassembly( 164 Addr pc, const SymbolTable *symtab) const override; |
158}; 159 160class RegRegOp : public PredOp 161{ 162 protected: 163 IntRegIndex dest; 164 IntRegIndex op1; 165 166 RegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 167 IntRegIndex _dest, IntRegIndex _op1) : 168 PredOp(mnem, _machInst, __opClass), dest(_dest), op1(_op1) 169 {} 170 | 165}; 166 167class RegRegOp : public PredOp 168{ 169 protected: 170 IntRegIndex dest; 171 IntRegIndex op1; 172 173 RegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 174 IntRegIndex _dest, IntRegIndex _op1) : 175 PredOp(mnem, _machInst, __opClass), dest(_dest), op1(_op1) 176 {} 177 |
171 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 178 std::string generateDisassembly( 179 Addr pc, const SymbolTable *symtab) const override; |
172}; 173 174class RegImmRegOp : public PredOp 175{ 176 protected: 177 IntRegIndex dest; 178 uint64_t imm; 179 IntRegIndex op1; 180 181 RegImmRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 182 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1) : 183 PredOp(mnem, _machInst, __opClass), 184 dest(_dest), imm(_imm), op1(_op1) 185 {} 186 | 180}; 181 182class RegImmRegOp : public PredOp 183{ 184 protected: 185 IntRegIndex dest; 186 uint64_t imm; 187 IntRegIndex op1; 188 189 RegImmRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 190 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1) : 191 PredOp(mnem, _machInst, __opClass), 192 dest(_dest), imm(_imm), op1(_op1) 193 {} 194 |
187 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 195 std::string generateDisassembly( 196 Addr pc, const SymbolTable *symtab) const override; |
188}; 189 190class RegRegRegImmOp : public PredOp 191{ 192 protected: 193 IntRegIndex dest; 194 IntRegIndex op1; 195 IntRegIndex op2; 196 uint64_t imm; 197 198 RegRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 199 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 200 uint64_t _imm) : 201 PredOp(mnem, _machInst, __opClass), 202 dest(_dest), op1(_op1), op2(_op2), imm(_imm) 203 {} 204 | 197}; 198 199class RegRegRegImmOp : public PredOp 200{ 201 protected: 202 IntRegIndex dest; 203 IntRegIndex op1; 204 IntRegIndex op2; 205 uint64_t imm; 206 207 RegRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 208 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 209 uint64_t _imm) : 210 PredOp(mnem, _machInst, __opClass), 211 dest(_dest), op1(_op1), op2(_op2), imm(_imm) 212 {} 213 |
205 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 214 std::string generateDisassembly( 215 Addr pc, const SymbolTable *symtab) const override; |
206}; 207 208class RegRegRegRegOp : public PredOp 209{ 210 protected: 211 IntRegIndex dest; 212 IntRegIndex op1; 213 IntRegIndex op2; 214 IntRegIndex op3; 215 216 RegRegRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 217 IntRegIndex _dest, IntRegIndex _op1, 218 IntRegIndex _op2, IntRegIndex _op3) : 219 PredOp(mnem, _machInst, __opClass), 220 dest(_dest), op1(_op1), op2(_op2), op3(_op3) 221 {} 222 | 216}; 217 218class RegRegRegRegOp : public PredOp 219{ 220 protected: 221 IntRegIndex dest; 222 IntRegIndex op1; 223 IntRegIndex op2; 224 IntRegIndex op3; 225 226 RegRegRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 227 IntRegIndex _dest, IntRegIndex _op1, 228 IntRegIndex _op2, IntRegIndex _op3) : 229 PredOp(mnem, _machInst, __opClass), 230 dest(_dest), op1(_op1), op2(_op2), op3(_op3) 231 {} 232 |
223 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 233 std::string generateDisassembly( 234 Addr pc, const SymbolTable *symtab) const override; |
224}; 225 226class RegRegRegOp : public PredOp 227{ 228 protected: 229 IntRegIndex dest; 230 IntRegIndex op1; 231 IntRegIndex op2; 232 233 RegRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 234 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : 235 PredOp(mnem, _machInst, __opClass), 236 dest(_dest), op1(_op1), op2(_op2) 237 {} 238 | 235}; 236 237class RegRegRegOp : public PredOp 238{ 239 protected: 240 IntRegIndex dest; 241 IntRegIndex op1; 242 IntRegIndex op2; 243 244 RegRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 245 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : 246 PredOp(mnem, _machInst, __opClass), 247 dest(_dest), op1(_op1), op2(_op2) 248 {} 249 |
239 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 250 std::string generateDisassembly( 251 Addr pc, const SymbolTable *symtab) const override; |
240}; 241 242class RegRegImmOp : public PredOp 243{ 244 protected: 245 IntRegIndex dest; 246 IntRegIndex op1; 247 uint64_t imm; 248 249 RegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 250 IntRegIndex _dest, IntRegIndex _op1, 251 uint64_t _imm) : 252 PredOp(mnem, _machInst, __opClass), 253 dest(_dest), op1(_op1), imm(_imm) 254 {} 255 | 252}; 253 254class RegRegImmOp : public PredOp 255{ 256 protected: 257 IntRegIndex dest; 258 IntRegIndex op1; 259 uint64_t imm; 260 261 RegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 262 IntRegIndex _dest, IntRegIndex _op1, 263 uint64_t _imm) : 264 PredOp(mnem, _machInst, __opClass), 265 dest(_dest), op1(_op1), imm(_imm) 266 {} 267 |
256 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 268 std::string generateDisassembly( 269 Addr pc, const SymbolTable *symtab) const override; |
257}; 258 259class MiscRegRegImmOp : public PredOp 260{ 261 protected: 262 MiscRegIndex dest; 263 IntRegIndex op1; 264 uint64_t imm; 265 266 MiscRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 267 MiscRegIndex _dest, IntRegIndex _op1, 268 uint64_t _imm) : 269 PredOp(mnem, _machInst, __opClass), 270 dest(_dest), op1(_op1), imm(_imm) 271 {} 272 | 270}; 271 272class MiscRegRegImmOp : public PredOp 273{ 274 protected: 275 MiscRegIndex dest; 276 IntRegIndex op1; 277 uint64_t imm; 278 279 MiscRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 280 MiscRegIndex _dest, IntRegIndex _op1, 281 uint64_t _imm) : 282 PredOp(mnem, _machInst, __opClass), 283 dest(_dest), op1(_op1), imm(_imm) 284 {} 285 |
273 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 286 std::string generateDisassembly( 287 Addr pc, const SymbolTable *symtab) const override; |
274}; 275 276class RegMiscRegImmOp : public PredOp 277{ 278 protected: 279 IntRegIndex dest; 280 MiscRegIndex op1; 281 uint64_t imm; 282 283 RegMiscRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 284 IntRegIndex _dest, MiscRegIndex _op1, 285 uint64_t _imm) : 286 PredOp(mnem, _machInst, __opClass), 287 dest(_dest), op1(_op1), imm(_imm) 288 {} 289 | 288}; 289 290class RegMiscRegImmOp : public PredOp 291{ 292 protected: 293 IntRegIndex dest; 294 MiscRegIndex op1; 295 uint64_t imm; 296 297 RegMiscRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 298 IntRegIndex _dest, MiscRegIndex _op1, 299 uint64_t _imm) : 300 PredOp(mnem, _machInst, __opClass), 301 dest(_dest), op1(_op1), imm(_imm) 302 {} 303 |
290 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 304 std::string generateDisassembly( 305 Addr pc, const SymbolTable *symtab) const override; |
291}; 292 293class RegImmImmOp : public PredOp 294{ 295 protected: 296 IntRegIndex dest; 297 uint64_t imm1; 298 uint64_t imm2; 299 300 RegImmImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 301 IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2) : 302 PredOp(mnem, _machInst, __opClass), 303 dest(_dest), imm1(_imm1), imm2(_imm2) 304 {} 305 | 306}; 307 308class RegImmImmOp : public PredOp 309{ 310 protected: 311 IntRegIndex dest; 312 uint64_t imm1; 313 uint64_t imm2; 314 315 RegImmImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 316 IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2) : 317 PredOp(mnem, _machInst, __opClass), 318 dest(_dest), imm1(_imm1), imm2(_imm2) 319 {} 320 |
306 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 321 std::string generateDisassembly( 322 Addr pc, const SymbolTable *symtab) const override; |
307}; 308 309class RegRegImmImmOp : public PredOp 310{ 311 protected: 312 IntRegIndex dest; 313 IntRegIndex op1; 314 uint64_t imm1; 315 uint64_t imm2; 316 317 RegRegImmImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 318 IntRegIndex _dest, IntRegIndex _op1, 319 uint64_t _imm1, uint64_t _imm2) : 320 PredOp(mnem, _machInst, __opClass), 321 dest(_dest), op1(_op1), imm1(_imm1), imm2(_imm2) 322 {} 323 | 323}; 324 325class RegRegImmImmOp : public PredOp 326{ 327 protected: 328 IntRegIndex dest; 329 IntRegIndex op1; 330 uint64_t imm1; 331 uint64_t imm2; 332 333 RegRegImmImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 334 IntRegIndex _dest, IntRegIndex _op1, 335 uint64_t _imm1, uint64_t _imm2) : 336 PredOp(mnem, _machInst, __opClass), 337 dest(_dest), op1(_op1), imm1(_imm1), imm2(_imm2) 338 {} 339 |
324 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 340 std::string generateDisassembly( 341 Addr pc, const SymbolTable *symtab) const override; |
325}; 326 327class RegImmRegShiftOp : public PredOp 328{ 329 protected: 330 IntRegIndex dest; 331 uint64_t imm; 332 IntRegIndex op1; 333 int32_t shiftAmt; 334 ArmShiftType shiftType; 335 336 RegImmRegShiftOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 337 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1, 338 int32_t _shiftAmt, ArmShiftType _shiftType) : 339 PredOp(mnem, _machInst, __opClass), 340 dest(_dest), imm(_imm), op1(_op1), 341 shiftAmt(_shiftAmt), shiftType(_shiftType) 342 {} 343 | 342}; 343 344class RegImmRegShiftOp : public PredOp 345{ 346 protected: 347 IntRegIndex dest; 348 uint64_t imm; 349 IntRegIndex op1; 350 int32_t shiftAmt; 351 ArmShiftType shiftType; 352 353 RegImmRegShiftOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 354 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1, 355 int32_t _shiftAmt, ArmShiftType _shiftType) : 356 PredOp(mnem, _machInst, __opClass), 357 dest(_dest), imm(_imm), op1(_op1), 358 shiftAmt(_shiftAmt), shiftType(_shiftType) 359 {} 360 |
344 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 361 std::string generateDisassembly( 362 Addr pc, const SymbolTable *symtab) const override; |
345}; 346 347class UnknownOp : public PredOp 348{ 349 protected: 350 351 UnknownOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 352 PredOp(mnem, _machInst, __opClass) 353 {} 354 | 363}; 364 365class UnknownOp : public PredOp 366{ 367 protected: 368 369 UnknownOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 370 PredOp(mnem, _machInst, __opClass) 371 {} 372 |
355 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; | 373 std::string generateDisassembly( 374 Addr pc, const SymbolTable *symtab) const override; |
356}; 357 358#endif | 375}; 376 377#endif |