misc.hh (10037:5cac77888310) | misc.hh (10418:7a76e13f0101) |
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1/* 2 * Copyright (c) 2010, 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 242 unchanged lines hidden (view full) --- 251 uint64_t _imm) : 252 PredOp(mnem, _machInst, __opClass), 253 dest(_dest), op1(_op1), imm(_imm) 254 {} 255 256 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 257}; 258 | 1/* 2 * Copyright (c) 2010, 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 242 unchanged lines hidden (view full) --- 251 uint64_t _imm) : 252 PredOp(mnem, _machInst, __opClass), 253 dest(_dest), op1(_op1), imm(_imm) 254 {} 255 256 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 257}; 258 |
259class MiscRegRegImmOp : public PredOp 260{ 261 protected: 262 MiscRegIndex dest; 263 IntRegIndex op1; 264 uint64_t imm; 265 266 MiscRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 267 MiscRegIndex _dest, IntRegIndex _op1, 268 uint64_t _imm) : 269 PredOp(mnem, _machInst, __opClass), 270 dest(_dest), op1(_op1), imm(_imm) 271 {} 272 273 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 274}; 275 276class RegMiscRegImmOp : public PredOp 277{ 278 protected: 279 IntRegIndex dest; 280 MiscRegIndex op1; 281 uint64_t imm; 282 283 RegMiscRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 284 IntRegIndex _dest, MiscRegIndex _op1, 285 uint64_t _imm) : 286 PredOp(mnem, _machInst, __opClass), 287 dest(_dest), op1(_op1), imm(_imm) 288 {} 289 290 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 291}; 292 |
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259class RegImmImmOp : public PredOp 260{ 261 protected: 262 IntRegIndex dest; 263 IntRegIndex op1; 264 uint64_t imm1; 265 uint64_t imm2; 266 --- 59 unchanged lines hidden --- | 293class RegImmImmOp : public PredOp 294{ 295 protected: 296 IntRegIndex dest; 297 IntRegIndex op1; 298 uint64_t imm1; 299 uint64_t imm2; 300 --- 59 unchanged lines hidden --- |