1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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137 uint32_t _imm) :
138 PredOp(mnem, _machInst, __opClass),
139 dest(_dest), op1(_op1), op2(_op2), imm(_imm)
140 {}
141
142 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
143};
144
145class RegImmRegShiftOp : public PredOp
146{
147 protected:
148 IntRegIndex dest;
149 uint32_t imm;
150 IntRegIndex op1;
151 int32_t shiftAmt;
152 ArmShiftType shiftType;

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