1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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119 IntRegIndex _dest, uint32_t _imm, IntRegIndex _op1) :
120 PredOp(mnem, _machInst, __opClass),
121 dest(_dest), imm(_imm), op1(_op1)
122 {}
123
124 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
125};
126
127class RegImmRegShiftOp : public PredOp
128{
129 protected:
130 IntRegIndex dest;
131 uint32_t imm;
132 IntRegIndex op1;
133 int32_t shiftAmt;
134 ArmShiftType shiftType;

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