1/*
2 * Copyright (c) 2011-2013,2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39#ifndef __ARCH_ARM_MEM64_HH__
40#define __ARCH_ARM_MEM64_HH__
41
42#include "arch/arm/insts/static_inst.hh"
43
44namespace ArmISA
45{
46
47class SysDC64 : public ArmStaticInst
48{
49 protected:
50 IntRegIndex base;
51 IntRegIndex dest;
52 uint64_t imm;
53
54 SysDC64(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
55 IntRegIndex _base, MiscRegIndex miscReg, uint64_t _imm)
56 : ArmStaticInst(mnem, _machInst, __opClass), base(_base),
57 dest((IntRegIndex)miscReg), imm(_imm)
58 {}
59 std::string generateDisassembly(
60 Addr pc, const SymbolTable *symtab) const override;
61};
62
63class MightBeMicro64 : public ArmStaticInst
64{
65 protected:
66 MightBeMicro64(const char *mnem, ExtMachInst _machInst, OpClass __opClass)

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