1/*
2 * Copyright (c) 2011-2013,2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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51 IntRegIndex dest;
52 uint64_t imm;
53
54 SysDC64(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
55 IntRegIndex _base, MiscRegIndex miscReg, uint64_t _imm)
56 : ArmStaticInst(mnem, _machInst, __opClass), base(_base),
57 dest((IntRegIndex)miscReg), imm(_imm)
58 {}
59 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
60};
61
62class MightBeMicro64 : public ArmStaticInst
63{
64 protected:
65 MightBeMicro64(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
66 : ArmStaticInst(mnem, _machInst, __opClass)
67 {}

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108
109 virtual
110 ~Memory64()
111 {
112 delete [] uops;
113 }
114
115 StaticInstPtr
116 fetchMicroop(MicroPC microPC) const
117 {
118 assert(uops != NULL && microPC < numMicroops);
119 return uops[microPC];
120 }
121
122 void startDisassembly(std::ostream &os) const;
123
124 unsigned memAccessFlags;

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131 protected:
132 int64_t imm;
133
134 MemoryImm64(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
135 IntRegIndex _dest, IntRegIndex _base, int64_t _imm)
136 : Memory64(mnem, _machInst, __opClass, _dest, _base), imm(_imm)
137 {}
138
139 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
140};
141
142class MemoryDImm64 : public MemoryImm64
143{
144 protected:
145 IntRegIndex dest2;
146
147 MemoryDImm64(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
148 IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base,
149 int64_t _imm)
150 : MemoryImm64(mnem, _machInst, __opClass, _dest, _base, _imm),
151 dest2(_dest2)
152 {}
153
154 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
155};
156
157class MemoryDImmEx64 : public MemoryDImm64
158{
159 protected:
160 IntRegIndex result;
161
162 MemoryDImmEx64(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
163 IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2,
164 IntRegIndex _base, int32_t _imm)
165 : MemoryDImm64(mnem, _machInst, __opClass, _dest, _dest2,
166 _base, _imm), result(_result)
167 {}
168
169 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
170};
171
172class MemoryPreIndex64 : public MemoryImm64
173{
174 protected:
175 MemoryPreIndex64(const char *mnem, ExtMachInst _machInst,
176 OpClass __opClass, IntRegIndex _dest, IntRegIndex _base,
177 int64_t _imm)
178 : MemoryImm64(mnem, _machInst, __opClass, _dest, _base, _imm)
179 {}
180
181 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
182};
183
184class MemoryPostIndex64 : public MemoryImm64
185{
186 protected:
187 MemoryPostIndex64(const char *mnem, ExtMachInst _machInst,
188 OpClass __opClass, IntRegIndex _dest, IntRegIndex _base,
189 int64_t _imm)
190 : MemoryImm64(mnem, _machInst, __opClass, _dest, _base, _imm)
191 {}
192
193 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
194};
195
196class MemoryReg64 : public Memory64
197{
198 protected:
199 IntRegIndex offset;
200 ArmExtendType type;
201 uint64_t shiftAmt;
202
203 MemoryReg64(const char *mnem, ExtMachInst _machInst,
204 OpClass __opClass, IntRegIndex _dest, IntRegIndex _base,
205 IntRegIndex _offset, ArmExtendType _type,
206 uint64_t _shiftAmt)
207 : Memory64(mnem, _machInst, __opClass, _dest, _base),
208 offset(_offset), type(_type), shiftAmt(_shiftAmt)
209 {}
210
211 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
212};
213
214class MemoryRaw64 : public Memory64
215{
216 protected:
217 MemoryRaw64(const char *mnem, ExtMachInst _machInst,
218 OpClass __opClass, IntRegIndex _dest, IntRegIndex _base)
219 : Memory64(mnem, _machInst, __opClass, _dest, _base)
220 {}
221
222 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
223};
224
225class MemoryEx64 : public Memory64
226{
227 protected:
228 IntRegIndex result;
229
230 MemoryEx64(const char *mnem, ExtMachInst _machInst,
231 OpClass __opClass, IntRegIndex _dest, IntRegIndex _base,
232 IntRegIndex _result)
233 : Memory64(mnem, _machInst, __opClass, _dest, _base), result(_result)
234 {}
235
236 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
237};
238
239class MemoryLiteral64 : public Memory64
240{
241 protected:
242 int64_t imm;
243
244 MemoryLiteral64(const char *mnem, ExtMachInst _machInst,
245 OpClass __opClass, IntRegIndex _dest, int64_t _imm)
246 : Memory64(mnem, _machInst, __opClass, _dest, INTREG_ZERO), imm(_imm)
247 {}
248
249 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
250};
251}
252
253#endif //__ARCH_ARM_INSTS_MEM_HH__