mem.hh (7312:03016344f54e) mem.hh (7428:eea9a618c882)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 232 unchanged lines hidden (view full) ---

241 MemoryReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
242 IntRegIndex _dest, IntRegIndex _base, bool _add,
243 int32_t _shiftAmt, ArmShiftType _shiftType,
244 IntRegIndex _index)
245 : Memory(mnem, _machInst, __opClass, _dest, _base, _add),
246 shiftAmt(_shiftAmt), shiftType(_shiftType), index(_index)
247 {}
248
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 232 unchanged lines hidden (view full) ---

241 MemoryReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
242 IntRegIndex _dest, IntRegIndex _base, bool _add,
243 int32_t _shiftAmt, ArmShiftType _shiftType,
244 IntRegIndex _index)
245 : Memory(mnem, _machInst, __opClass, _dest, _base, _add),
246 shiftAmt(_shiftAmt), shiftType(_shiftType), index(_index)
247 {}
248
249 void
250 printOffset(std::ostream &os) const
251 {
252 if (!add)
253 os << "-";
254 printReg(os, index);
255 if (shiftType != LSL || shiftAmt != 0) {
256 switch (shiftType) {
257 case LSL:
258 ccprintf(os, " LSL #%d", shiftAmt);
259 break;
260 case LSR:
261 if (shiftAmt == 0) {
262 ccprintf(os, " LSR #%d", 32);
263 } else {
264 ccprintf(os, " LSR #%d", shiftAmt);
265 }
266 break;
267 case ASR:
268 if (shiftAmt == 0) {
269 ccprintf(os, " ASR #%d", 32);
270 } else {
271 ccprintf(os, " ASR #%d", shiftAmt);
272 }
273 break;
274 case ROR:
275 if (shiftAmt == 0) {
276 ccprintf(os, " RRX");
277 } else {
278 ccprintf(os, " ROR #%d", shiftAmt);
279 }
280 break;
281 }
282 }
283 }
249 void printOffset(std::ostream &os) const;
284};
285
286class MemoryDReg : public MemoryReg
287{
288 protected:
289 IntRegIndex dest2;
290
291 MemoryDReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,

--- 170 unchanged lines hidden ---
250};
251
252class MemoryDReg : public MemoryReg
253{
254 protected:
255 IntRegIndex dest2;
256
257 MemoryDReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass,

--- 170 unchanged lines hidden ---