mem.hh (7132:83b433d6e600) | mem.hh (7205:e3dfcdf19561) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 33 unchanged lines hidden (view full) --- 42#ifndef __ARCH_ARM_MEM_HH__ 43#define __ARCH_ARM_MEM_HH__ 44 45#include "arch/arm/insts/pred_inst.hh" 46 47namespace ArmISA 48{ 49 | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 33 unchanged lines hidden (view full) --- 42#ifndef __ARCH_ARM_MEM_HH__ 43#define __ARCH_ARM_MEM_HH__ 44 45#include "arch/arm/insts/pred_inst.hh" 46 47namespace ArmISA 48{ 49 |
50class Swap : public PredOp 51{ 52 protected: 53 IntRegIndex dest; 54 IntRegIndex op1; 55 IntRegIndex base; 56 57 Swap(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 58 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _base) 59 : PredOp(mnem, _machInst, __opClass), 60 dest(_dest), op1(_op1), base(_base) 61 {} 62 63 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 64}; 65 |
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50class Memory : public PredOp 51{ 52 public: 53 enum AddrMode { 54 AddrMd_Offset, 55 AddrMd_PreIndex, 56 AddrMd_PostIndex 57 }; --- 177 unchanged lines hidden --- | 66class Memory : public PredOp 67{ 68 public: 69 enum AddrMode { 70 AddrMd_Offset, 71 AddrMd_PreIndex, 72 AddrMd_PostIndex 73 }; --- 177 unchanged lines hidden --- |