macromem.hh (6309:7f10d636910b) macromem.hh (6726:a5322e816a2a)
1/* Copyright (c) 2007-2008 The Florida State University
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright

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79 }
80};
81
82/**
83 * Arm Macro Memory operations like LDM/STM
84 */
85class ArmMacroMemoryOp : public PredMacroOp
86{
1/* Copyright (c) 2007-2008 The Florida State University
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright

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79 }
80};
81
82/**
83 * Arm Macro Memory operations like LDM/STM
84 */
85class ArmMacroMemoryOp : public PredMacroOp
86{
87 protected:
87 protected:
88 /// Memory request flags. See mem_req_base.hh.
89 unsigned memAccessFlags;
90
91 uint32_t reglist;
92 uint32_t ones;
88 /// Memory request flags. See mem_req_base.hh.
89 unsigned memAccessFlags;
90
91 uint32_t reglist;
92 uint32_t ones;
93 uint32_t puswl,
94 prepost,
95 up,
96 psruser,
97 writeback,
98 loadop;
99
100 ArmMacroMemoryOp(const char *mnem, ExtMachInst _machInst,
101 OpClass __opClass)
93
94 ArmMacroMemoryOp(const char *mnem, ExtMachInst _machInst,
95 OpClass __opClass)
102 : PredMacroOp(mnem, _machInst, __opClass),
103 memAccessFlags(0),
104 reglist(machInst.regList), ones(0),
105 puswl(machInst.puswl),
106 prepost(machInst.puswl.prepost),
107 up(machInst.puswl.up),
108 psruser(machInst.puswl.psruser),
109 writeback(machInst.puswl.writeback),
110 loadop(machInst.puswl.loadOp)
96 : PredMacroOp(mnem, _machInst, __opClass), memAccessFlags(0),
97 reglist(machInst.regList), ones(0)
111 {
112 ones = number_of_ones(reglist);
98 {
99 ones = number_of_ones(reglist);
113 numMicroops = ones + writeback + 1;
100 numMicroops = ones + machInst.puswl.writeback + 1;
114 // Remember that writeback adds a uop
115 microOps = new StaticInstPtr[numMicroops];
116 }
117};
118
119/**
120 * Arm Macro FPA operations to fix ldfd and stfd instructions
121 */
122class ArmMacroFPAOp : public PredMacroOp
123{
101 // Remember that writeback adds a uop
102 microOps = new StaticInstPtr[numMicroops];
103 }
104};
105
106/**
107 * Arm Macro FPA operations to fix ldfd and stfd instructions
108 */
109class ArmMacroFPAOp : public PredMacroOp
110{
124 protected:
111 protected:
125 uint32_t puswl,
126 prepost,
127 up,
128 psruser,
129 writeback,
130 loadop;
131 int32_t disp8;
132

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145 }
146};
147
148/**
149 * Arm Macro FM operations to fix lfm and sfm
150 */
151class ArmMacroFMOp : public PredMacroOp
152{
112 uint32_t puswl,
113 prepost,
114 up,
115 psruser,
116 writeback,
117 loadop;
118 int32_t disp8;
119

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132 }
133};
134
135/**
136 * Arm Macro FM operations to fix lfm and sfm
137 */
138class ArmMacroFMOp : public PredMacroOp
139{
153 protected:
140 protected:
154 uint32_t punwl,
155 prepost,
156 up,
157 n1bit,
158 writeback,
159 loadop,
160 n0bit,
161 count;

--- 24 unchanged lines hidden --- 		141 uint32_t punwl,
142 prepost,
143 up,
144 n1bit,
145 writeback,
146 loadop,
147 n0bit,
148 count;

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