1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55 for (int i = 0; i < 32; i++ )
56 {
57 if ( val & (1<<i) )
58 ones++;
59 }
60 return ones;
61}
62
63/**
64 * Base class for Memory microops
65 */
66class MicroOp : public PredOp
67{
68 protected:
69 MicroOp(const char *mnem, ExtMachInst machInst, OpClass __opClass)
70 : PredOp(mnem, machInst, __opClass)
71 {
72 }
73

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108 MicroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
109 RegIndex _ura, RegIndex _urb, bool _up, uint8_t _imm)
110 : MicroIntOp(mnem, machInst, __opClass, _ura, _urb, _imm),
111 up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord)
112 {
113 }
114};
115
116/**
117 * Base class for microcoded integer memory instructions.
118 */
119class MacroMemOp : public PredMacroOp
120{
121 protected:
122 MacroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
123 IntRegIndex rn, bool index, bool up, bool user,
124 bool writeback, bool load, uint32_t reglist);
125};
126
127/**
128 * Base class for microcoded floating point memory instructions.
129 */
130class MacroVFPMemOp : public PredMacroOp
131{
132 protected:
133 MacroVFPMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
134 IntRegIndex rn, RegIndex vd, bool single, bool up,
135 bool writeback, bool load, uint32_t offset);
136};
137
138}
139
140#endif //__ARCH_ARM_INSTS_MACROMEM_HH__