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> /**
> * Microops of the form IntRegA = IntRegB
> */
> class MicroIntMov : public MicroOp
> {
> protected:
> RegIndex ura, urb;
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> MicroIntMov(const char *mnem, ExtMachInst machInst, OpClass __opClass,
> RegIndex _ura, RegIndex _urb)
> : MicroOp(mnem, machInst, __opClass),
> ura(_ura), urb(_urb)
> {
> }
>
> std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
> };
>
139c156
< uint8_t imm;
---
> uint32_t imm;
142c159
< RegIndex _ura, RegIndex _urb, uint8_t _imm)
---
> RegIndex _ura, RegIndex _urb, uint32_t _imm)
169a187,206
> * Microops of the form IntRegA = IntRegB op shifted IntRegC
> */
> class MicroIntRegOp : public MicroOp
> {
> protected:
> RegIndex ura, urb, urc;
> int32_t shiftAmt;
> ArmShiftType shiftType;
>
> MicroIntRegOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
> RegIndex _ura, RegIndex _urb, RegIndex _urc,
> int32_t _shiftAmt, ArmShiftType _shiftType)
> : MicroOp(mnem, machInst, __opClass),
> ura(_ura), urb(_urb), urc(_urc),
> shiftAmt(_shiftAmt), shiftType(_shiftType)
> {
> }
> };
>
> /**