1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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80 } else if (flags[IsMicroop]) {
81 pcState.uAdvance();
82 } else {
83 pcState.advance();
84 }
85 }
86};
87
88/**
89 * Microops for Neon loads/stores
90 */
91class MicroNeonMemOp : public MicroOp
92{
93 protected:
94 RegIndex dest, ura;
95 uint32_t imm;

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131 uint32_t _step, unsigned _lane)
132 : MicroNeonMixOp(mnem, machInst, __opClass, _dest, _op1, _step),
133 lane(_lane)
134 {
135 }
136};
137
138/**
139 * Microops of the form
140 * PC = IntRegA
141 * CPSR = IntRegB
142 */
143class MicroSetPCCPSR : public MicroOp
144{
145 protected:
146 IntRegIndex ura, urb, urc;

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175
176/**
177 * Microops of the form IntRegA = IntRegB op Imm
178 */
179class MicroIntImmOp : public MicroOp
180{
181 protected:
182 RegIndex ura, urb;
183 uint32_t imm;
184
185 MicroIntImmOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
186 RegIndex _ura, RegIndex _urb, uint32_t _imm)
187 : MicroOp(mnem, machInst, __opClass),
188 ura(_ura), urb(_urb), imm(_imm)
189 {
190 }
191
192 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
193};
194
195/**
196 * Microops of the form IntRegA = IntRegB op IntRegC
197 */
198class MicroIntOp : public MicroOp
199{
200 protected:
201 RegIndex ura, urb, urc;
202
203 MicroIntOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
204 RegIndex _ura, RegIndex _urb, RegIndex _urc)
205 : MicroOp(mnem, machInst, __opClass),
206 ura(_ura), urb(_urb), urc(_urc)
207 {
208 }
209
210 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
211};
212
213/**
214 * Microops of the form IntRegA = IntRegB op shifted IntRegC
215 */
216class MicroIntRegOp : public MicroOp
217{
218 protected:
219 RegIndex ura, urb, urc;
220 int32_t shiftAmt;

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256{
257 protected:
258 MacroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
259 IntRegIndex rn, bool index, bool up, bool user,
260 bool writeback, bool load, uint32_t reglist);
261};
262
263/**
264 * Base classes for microcoded integer memory instructions.
265 */
266class VldMultOp : public PredMacroOp
267{
268 protected:
269 VldMultOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
270 unsigned elems, RegIndex rn, RegIndex vd, unsigned regs,
271 unsigned inc, uint32_t size, uint32_t align, RegIndex rm);

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