1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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123 MicroNeonMixLaneOp(const char *mnem, ExtMachInst machInst,
124 OpClass __opClass, RegIndex _dest, RegIndex _op1,
125 uint32_t _step, unsigned _lane)
126 : MicroNeonMixOp(mnem, machInst, __opClass, _dest, _op1, _step),
127 lane(_lane)
128 {
129 }
130};
131
132/**
133 * Microops of the form IntRegA = IntRegB op Imm
134 */
135class MicroIntImmOp : public MicroOp
136{
137 protected:
138 RegIndex ura, urb;
139 uint8_t imm;
140
141 MicroIntImmOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
142 RegIndex _ura, RegIndex _urb, uint8_t _imm)
143 : MicroOp(mnem, machInst, __opClass),
144 ura(_ura), urb(_urb), imm(_imm)
145 {
146 }
147
148 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
149};
150

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162 ura(_ura), urb(_urb), urc(_urc)
163 {
164 }
165
166 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
167};
168
169/**
170 * Memory microops which use IntReg + Imm addressing
171 */
172class MicroMemOp : public MicroIntImmOp
173{
174 protected:
175 bool up;
176 unsigned memAccessFlags;
177

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