macromem.cc (11793:ef606668d247) macromem.cc (12104:edd63f9c6184)
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1520 }
1521}
1522
1523std::string
1524MicroIntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1525{
1526 std::stringstream ss;
1527 printMnemonic(ss);
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1511 unchanged lines hidden (view full) ---

1520 }
1521}
1522
1523std::string
1524MicroIntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1525{
1526 std::stringstream ss;
1527 printMnemonic(ss);
1528 printReg(ss, ura);
1528 printIntReg(ss, ura);
1529 ss << ", ";
1529 ss << ", ";
1530 printReg(ss, urb);
1530 printIntReg(ss, urb);
1531 ss << ", ";
1532 ccprintf(ss, "#%d", imm);
1533 return ss.str();
1534}
1535
1536std::string
1537MicroIntImmXOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1538{
1539 std::stringstream ss;
1540 printMnemonic(ss);
1531 ss << ", ";
1532 ccprintf(ss, "#%d", imm);
1533 return ss.str();
1534}
1535
1536std::string
1537MicroIntImmXOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1538{
1539 std::stringstream ss;
1540 printMnemonic(ss);
1541 printReg(ss, ura);
1541 printIntReg(ss, ura);
1542 ss << ", ";
1542 ss << ", ";
1543 printReg(ss, urb);
1543 printIntReg(ss, urb);
1544 ss << ", ";
1545 ccprintf(ss, "#%d", imm);
1546 return ss.str();
1547}
1548
1549std::string
1550MicroSetPCCPSR::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1551{
1552 std::stringstream ss;
1553 printMnemonic(ss);
1554 ss << "[PC,CPSR]";
1555 return ss.str();
1556}
1557
1558std::string
1559MicroIntRegXOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1560{
1561 std::stringstream ss;
1562 printMnemonic(ss);
1544 ss << ", ";
1545 ccprintf(ss, "#%d", imm);
1546 return ss.str();
1547}
1548
1549std::string
1550MicroSetPCCPSR::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1551{
1552 std::stringstream ss;
1553 printMnemonic(ss);
1554 ss << "[PC,CPSR]";
1555 return ss.str();
1556}
1557
1558std::string
1559MicroIntRegXOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1560{
1561 std::stringstream ss;
1562 printMnemonic(ss);
1563 printReg(ss, ura);
1563 printIntReg(ss, ura);
1564 ccprintf(ss, ", ");
1564 ccprintf(ss, ", ");
1565 printReg(ss, urb);
1565 printIntReg(ss, urb);
1566 printExtendOperand(false, ss, (IntRegIndex)urc, type, shiftAmt);
1567 return ss.str();
1568}
1569
1570std::string
1571MicroIntMov::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1572{
1573 std::stringstream ss;
1574 printMnemonic(ss);
1566 printExtendOperand(false, ss, (IntRegIndex)urc, type, shiftAmt);
1567 return ss.str();
1568}
1569
1570std::string
1571MicroIntMov::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1572{
1573 std::stringstream ss;
1574 printMnemonic(ss);
1575 printReg(ss, ura);
1575 printIntReg(ss, ura);
1576 ss << ", ";
1576 ss << ", ";
1577 printReg(ss, urb);
1577 printIntReg(ss, urb);
1578 return ss.str();
1579}
1580
1581std::string
1582MicroIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1583{
1584 std::stringstream ss;
1585 printMnemonic(ss);
1578 return ss.str();
1579}
1580
1581std::string
1582MicroIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1583{
1584 std::stringstream ss;
1585 printMnemonic(ss);
1586 printReg(ss, ura);
1586 printIntReg(ss, ura);
1587 ss << ", ";
1587 ss << ", ";
1588 printReg(ss, urb);
1588 printIntReg(ss, urb);
1589 ss << ", ";
1589 ss << ", ";
1590 printReg(ss, urc);
1590 printIntReg(ss, urc);
1591 return ss.str();
1592}
1593
1594std::string
1595MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1596{
1597 std::stringstream ss;
1598 printMnemonic(ss);
1599 if (isFloating())
1591 return ss.str();
1592}
1593
1594std::string
1595MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1596{
1597 std::stringstream ss;
1598 printMnemonic(ss);
1599 if (isFloating())
1600 printReg(ss, ura + FP_Reg_Base);
1600 printFloatReg(ss, ura);
1601 else
1601 else
1602 printReg(ss, ura);
1602 printIntReg(ss, ura);
1603 ss << ", [";
1603 ss << ", [";
1604 printReg(ss, urb);
1604 printIntReg(ss, urb);
1605 ss << ", ";
1606 ccprintf(ss, "#%d", imm);
1607 ss << "]";
1608 return ss.str();
1609}
1610
1611std::string
1612MicroMemPairOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1613{
1614 std::stringstream ss;
1615 printMnemonic(ss);
1605 ss << ", ";
1606 ccprintf(ss, "#%d", imm);
1607 ss << "]";
1608 return ss.str();
1609}
1610
1611std::string
1612MicroMemPairOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
1613{
1614 std::stringstream ss;
1615 printMnemonic(ss);
1616 printReg(ss, dest);
1616 printIntReg(ss, dest);
1617 ss << ",";
1617 ss << ",";
1618 printReg(ss, dest2);
1618 printIntReg(ss, dest2);
1619 ss << ", [";
1619 ss << ", [";
1620 printReg(ss, urb);
1620 printIntReg(ss, urb);
1621 ss << ", ";
1622 ccprintf(ss, "#%d", imm);
1623 ss << "]";
1624 return ss.str();
1625}
1626
1627}
1621 ss << ", ";
1622 ccprintf(ss, "#%d", imm);
1623 ss << "]";
1624 return ss.str();
1625}
1626
1627}