macromem.cc (10346:d96b61d843b2) macromem.cc (10537:47fe87b0cf97)
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1276 microOps[numMicroops - 1]->setLastMicroop();
1277}
1278
1279VldSingleOp64::VldSingleOp64(const char *mnem, ExtMachInst machInst,
1280 OpClass __opClass, RegIndex rn, RegIndex vd,
1281 RegIndex rm, uint8_t eSize, uint8_t dataSize,
1282 uint8_t numStructElems, uint8_t index, bool wb,
1283 bool replicate) :
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1267 unchanged lines hidden (view full) ---

1276 microOps[numMicroops - 1]->setLastMicroop();
1277}
1278
1279VldSingleOp64::VldSingleOp64(const char *mnem, ExtMachInst machInst,
1280 OpClass __opClass, RegIndex rn, RegIndex vd,
1281 RegIndex rm, uint8_t eSize, uint8_t dataSize,
1282 uint8_t numStructElems, uint8_t index, bool wb,
1283 bool replicate) :
1284 PredMacroOp(mnem, machInst, __opClass)
1284 PredMacroOp(mnem, machInst, __opClass),
1285 eSize(0), dataSize(0), numStructElems(0), index(0),
1286 wb(false), replicate(false)
1287
1285{
1286 RegIndex vx = NumFloatV8ArchRegs / 4;
1287 RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1288 bool baseIsSP = isSP((IntRegIndex) rnsp);
1289
1290 numMicroops = wb ? 1 : 0;
1291
1292 int eSizeBytes = 1 << eSize;

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1347 microOps[numMicroops - 1]->setLastMicroop();
1348}
1349
1350VstSingleOp64::VstSingleOp64(const char *mnem, ExtMachInst machInst,
1351 OpClass __opClass, RegIndex rn, RegIndex vd,
1352 RegIndex rm, uint8_t eSize, uint8_t dataSize,
1353 uint8_t numStructElems, uint8_t index, bool wb,
1354 bool replicate) :
1288{
1289 RegIndex vx = NumFloatV8ArchRegs / 4;
1290 RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1291 bool baseIsSP = isSP((IntRegIndex) rnsp);
1292
1293 numMicroops = wb ? 1 : 0;
1294
1295 int eSizeBytes = 1 << eSize;

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1350 microOps[numMicroops - 1]->setLastMicroop();
1351}
1352
1353VstSingleOp64::VstSingleOp64(const char *mnem, ExtMachInst machInst,
1354 OpClass __opClass, RegIndex rn, RegIndex vd,
1355 RegIndex rm, uint8_t eSize, uint8_t dataSize,
1356 uint8_t numStructElems, uint8_t index, bool wb,
1357 bool replicate) :
1355 PredMacroOp(mnem, machInst, __opClass)
1358 PredMacroOp(mnem, machInst, __opClass),
1359 eSize(0), dataSize(0), numStructElems(0), index(0),
1360 wb(false), replicate(false)
1356{
1357 RegIndex vx = NumFloatV8ArchRegs / 4;
1358 RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1359 bool baseIsSP = isSP((IntRegIndex) rnsp);
1360
1361 numMicroops = wb ? 1 : 0;
1362
1363 int eSizeBytes = 1 << eSize;

--- 248 unchanged lines hidden --- 		1361{
1362 RegIndex vx = NumFloatV8ArchRegs / 4;
1363 RegIndex rnsp = (RegIndex) makeSP((IntRegIndex) rn);
1364 bool baseIsSP = isSP((IntRegIndex) rnsp);
1365
1366 numMicroops = wb ? 1 : 0;
1367
1368 int eSizeBytes = 1 << eSize;

--- 248 unchanged lines hidden ---