faults.hh (14091:090449e74135) faults.hh (14128:6ed23d07d0d1)
1/*
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
2 * Copyright (c) 2010, 2012-2013, 2016-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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77 OperatingMode toMode; // Next operating mode (aarch32)
78
79 // This variable is true if the above fault specific informations
80 // have been updated. This is to prevent that a client is using their
81 // un-updated default constructed value.
82 bool faultUpdated;
83
84 bool hypRouted; // True if the fault has been routed to Hypervisor
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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77 OperatingMode toMode; // Next operating mode (aarch32)
78
79 // This variable is true if the above fault specific informations
80 // have been updated. This is to prevent that a client is using their
81 // un-updated default constructed value.
82 bool faultUpdated;
83
84 bool hypRouted; // True if the fault has been routed to Hypervisor
85 bool span; // True if the fault is setting the PSTATE.PAN bit
85
86 virtual Addr getVector(ThreadContext *tc);
87 Addr getVector64(ThreadContext *tc);
88
89 public:
90 /// Generic fault source enums used to index into
91 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based
92 /// on the current register width state and the translation table format in

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195 armPcElrOffset(armPcElrOffset_), thumbPcElrOffset(thumbPcElrOffset_),
196 hypTrappable(hypTrappable_), abortDisable(abortDisable_),
197 fiqDisable(fiqDisable_), ec(ec_) {}
198 };
199
200 ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
201 machInst(_machInst), issRaw(_iss), from64(false), to64(false),
202 fromEL(EL0), toEL(EL0), fromMode(MODE_UNDEFINED),
86
87 virtual Addr getVector(ThreadContext *tc);
88 Addr getVector64(ThreadContext *tc);
89
90 public:
91 /// Generic fault source enums used to index into
92 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based
93 /// on the current register width state and the translation table format in

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196 armPcElrOffset(armPcElrOffset_), thumbPcElrOffset(thumbPcElrOffset_),
197 hypTrappable(hypTrappable_), abortDisable(abortDisable_),
198 fiqDisable(fiqDisable_), ec(ec_) {}
199 };
200
201 ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
202 machInst(_machInst), issRaw(_iss), from64(false), to64(false),
203 fromEL(EL0), toEL(EL0), fromMode(MODE_UNDEFINED),
203 faultUpdated(false), hypRouted(false) {}
204 faultUpdated(false), hypRouted(false), span(false) {}
204
205 // Returns the actual syndrome register to use based on the target
206 // exception level
207 MiscRegIndex getSyndromeReg64() const;
208 // Returns the actual fault address register to use based on the target
209 // exception level
210 MiscRegIndex getFaultAddrReg64() const;
211

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206 // Returns the actual syndrome register to use based on the target
207 // exception level
208 MiscRegIndex getSyndromeReg64() const;
209 // Returns the actual fault address register to use based on the target
210 // exception level
211 MiscRegIndex getFaultAddrReg64() const;
212

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