faults.hh (13896:5a827a65bd1d) faults.hh (14091:090449e74135)
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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229 virtual uint8_t thumbPcElrOffset() = 0;
230 virtual bool abortDisable(ThreadContext *tc) = 0;
231 virtual bool fiqDisable(ThreadContext *tc) = 0;
232 virtual ExceptionClass ec(ThreadContext *tc) const = 0;
233 virtual uint32_t iss() const = 0;
234 virtual bool isStage2() const { return false; }
235 virtual FSR getFsr(ThreadContext *tc) const { return 0; }
236 virtual void setSyndrome(ThreadContext *tc, MiscRegIndex syndrome_reg);
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 220 unchanged lines hidden (view full) ---

229 virtual uint8_t thumbPcElrOffset() = 0;
230 virtual bool abortDisable(ThreadContext *tc) = 0;
231 virtual bool fiqDisable(ThreadContext *tc) = 0;
232 virtual ExceptionClass ec(ThreadContext *tc) const = 0;
233 virtual uint32_t iss() const = 0;
234 virtual bool isStage2() const { return false; }
235 virtual FSR getFsr(ThreadContext *tc) const { return 0; }
236 virtual void setSyndrome(ThreadContext *tc, MiscRegIndex syndrome_reg);
237 virtual bool getFaultVAddr(Addr &va) const { return false; }
238
237};
238
239template<typename T>
240class ArmFaultVals : public ArmFault
241{
242 protected:
243 static FaultVals vals;
244

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430 AbortFault(Addr _faultAddr, bool _write, TlbEntry::DomainType _domain,
431 uint8_t _source, bool _stage2,
432 ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
433 faultAddr(_faultAddr), OVAddr(0), write(_write),
434 domain(_domain), source(_source), srcEncoded(0),
435 stage2(_stage2), s1ptw(false), tranMethod(_tranMethod)
436 {}
437
239};
240
241template<typename T>
242class ArmFaultVals : public ArmFault
243{
244 protected:
245 static FaultVals vals;
246

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432 AbortFault(Addr _faultAddr, bool _write, TlbEntry::DomainType _domain,
433 uint8_t _source, bool _stage2,
434 ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
435 faultAddr(_faultAddr), OVAddr(0), write(_write),
436 domain(_domain), source(_source), srcEncoded(0),
437 stage2(_stage2), s1ptw(false), tranMethod(_tranMethod)
438 {}
439
440 bool getFaultVAddr(Addr &va) const override;
441
438 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
439 StaticInst::nullStaticInstPtr) override;
440
441 FSR getFsr(ThreadContext *tc) const override;
442 uint8_t getFaultStatusCode(ThreadContext *tc) const;
443 bool abortDisable(ThreadContext *tc) override;
444 uint32_t iss() const override;
445 bool isStage2() const override { return stage2; }

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620template<> ArmFault::FaultVals ArmFaultVals<SupervisorTrap>::vals;
621template<> ArmFault::FaultVals ArmFaultVals<SecureMonitorTrap>::vals;
622template<> ArmFault::FaultVals ArmFaultVals<PCAlignmentFault>::vals;
623template<> ArmFault::FaultVals ArmFaultVals<SPAlignmentFault>::vals;
624template<> ArmFault::FaultVals ArmFaultVals<SystemError>::vals;
625template<> ArmFault::FaultVals ArmFaultVals<SoftwareBreakpoint>::vals;
626template<> ArmFault::FaultVals ArmFaultVals<ArmSev>::vals;
627
442 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
443 StaticInst::nullStaticInstPtr) override;
444
445 FSR getFsr(ThreadContext *tc) const override;
446 uint8_t getFaultStatusCode(ThreadContext *tc) const;
447 bool abortDisable(ThreadContext *tc) override;
448 uint32_t iss() const override;
449 bool isStage2() const override { return stage2; }

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624template<> ArmFault::FaultVals ArmFaultVals<SupervisorTrap>::vals;
625template<> ArmFault::FaultVals ArmFaultVals<SecureMonitorTrap>::vals;
626template<> ArmFault::FaultVals ArmFaultVals<PCAlignmentFault>::vals;
627template<> ArmFault::FaultVals ArmFaultVals<SPAlignmentFault>::vals;
628template<> ArmFault::FaultVals ArmFaultVals<SystemError>::vals;
629template<> ArmFault::FaultVals ArmFaultVals<SoftwareBreakpoint>::vals;
630template<> ArmFault::FaultVals ArmFaultVals<ArmSev>::vals;
631
632/**
633 * Returns true if the fault passed as a first argument was triggered
634 * by a memory access, false otherwise.
635 * If true it is storing the faulting address in the va argument
636 *
637 * @param fault generated fault
638 * @param va function will modify this passed-by-reference parameter
639 * with the correct faulting virtual address
640 * @return true if va contains a valid value, false otherwise
641 */
642bool getFaultVAddr(Fault fault, Addr &va);
628
643
644
629} // namespace ArmISA
630
631#endif // __ARM_FAULTS_HH__
645} // namespace ArmISA
646
647#endif // __ARM_FAULTS_HH__