faults.hh (13456:a0914e5cbc7a) faults.hh (13896:5a827a65bd1d)
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55#include "sim/full_system.hh"
56
57// The design of the "name" and "vect" functions is in sim/faults.hh
58
59namespace ArmISA
60{
61typedef Addr FaultOffset;
62
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55#include "sim/full_system.hh"
56
57// The design of the "name" and "vect" functions is in sim/faults.hh
58
59namespace ArmISA
60{
61typedef Addr FaultOffset;
62
63class ArmStaticInst;
64
63class ArmFault : public FaultBase
64{
65 protected:
66 ExtMachInst machInst;
67 uint32_t issRaw;
68
69 // Helper variables for ARMv8 exception handling
70 bool from64; // True if the exception is generated from the AArch64 state

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207 // exception level
208 MiscRegIndex getFaultAddrReg64() const;
209
210 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
211 StaticInst::nullStaticInstPtr) override;
212 void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
213 StaticInst::nullStaticInstPtr);
214 void update(ThreadContext *tc);
65class ArmFault : public FaultBase
66{
67 protected:
68 ExtMachInst machInst;
69 uint32_t issRaw;
70
71 // Helper variables for ARMv8 exception handling
72 bool from64; // True if the exception is generated from the AArch64 state

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209 // exception level
210 MiscRegIndex getFaultAddrReg64() const;
211
212 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
213 StaticInst::nullStaticInstPtr) override;
214 void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
215 StaticInst::nullStaticInstPtr);
216 void update(ThreadContext *tc);
217
218 ArmStaticInst *instrAnnotate(const StaticInstPtr &inst);
215 virtual void annotate(AnnotationIDs id, uint64_t val) {}
216 virtual FaultStat& countStat() = 0;
217 virtual FaultOffset offset(ThreadContext *tc) = 0;
218 virtual FaultOffset offset64(ThreadContext *tc) = 0;
219 virtual OperatingMode nextMode() = 0;
220 virtual bool routeToMonitor(ThreadContext *tc) const = 0;
221 virtual bool routeToHyp(ThreadContext *tc) const { return false; }
222 virtual uint8_t armPcOffset(bool isHyp) = 0;

--- 405 unchanged lines hidden --- 		219 virtual void annotate(AnnotationIDs id, uint64_t val) {}
220 virtual FaultStat& countStat() = 0;
221 virtual FaultOffset offset(ThreadContext *tc) = 0;
222 virtual FaultOffset offset64(ThreadContext *tc) = 0;
223 virtual OperatingMode nextMode() = 0;
224 virtual bool routeToMonitor(ThreadContext *tc) const = 0;
225 virtual bool routeToHyp(ThreadContext *tc) const { return false; }
226 virtual uint8_t armPcOffset(bool isHyp) = 0;

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