faults.hh (12732:c8b4f25eea9b) faults.hh (13396:23277eaae855)
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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76
77 // This variable is true if the above fault specific informations
78 // have been updated. This is to prevent that a client is using their
79 // un-updated default constructed value.
80 bool faultUpdated;
81
82 bool hypRouted; // True if the fault has been routed to Hypervisor
83
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 67 unchanged lines hidden (view full) ---

76
77 // This variable is true if the above fault specific informations
78 // have been updated. This is to prevent that a client is using their
79 // un-updated default constructed value.
80 bool faultUpdated;
81
82 bool hypRouted; // True if the fault has been routed to Hypervisor
83
84 Addr getVector(ThreadContext *tc);
84 virtual Addr getVector(ThreadContext *tc);
85 Addr getVector64(ThreadContext *tc);
86
87 public:
88 /// Generic fault source enums used to index into
89 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based
90 /// on the current register width state and the translation table format in
91 /// use
92 enum FaultSource

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264 bool abortDisable(ThreadContext* tc) override { return vals.abortDisable; }
265 bool fiqDisable(ThreadContext* tc) override { return vals.fiqDisable; }
266 ExceptionClass ec(ThreadContext *tc) const override { return vals.ec; }
267 uint32_t iss() const override { return issRaw; }
268};
269
270class Reset : public ArmFaultVals<Reset>
271{
85 Addr getVector64(ThreadContext *tc);
86
87 public:
88 /// Generic fault source enums used to index into
89 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based
90 /// on the current register width state and the translation table format in
91 /// use
92 enum FaultSource

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264 bool abortDisable(ThreadContext* tc) override { return vals.abortDisable; }
265 bool fiqDisable(ThreadContext* tc) override { return vals.fiqDisable; }
266 ExceptionClass ec(ThreadContext *tc) const override { return vals.ec; }
267 uint32_t iss() const override { return issRaw; }
268};
269
270class Reset : public ArmFaultVals<Reset>
271{
272 protected:
273 Addr getVector(ThreadContext *tc) override;
274
272 public:
273 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
274 StaticInst::nullStaticInstPtr) override;
275};
276
277class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
278{
279 protected:

--- 344 unchanged lines hidden --- 		275 public:
276 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
277 StaticInst::nullStaticInstPtr) override;
278};
279
280class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
281{
282 protected:

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