faults.hh (12568:c82782e5a84c) faults.hh (12569:fe1ff4059715)
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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66 ExtMachInst machInst;
67 uint32_t issRaw;
68
69 // Helper variables for ARMv8 exception handling
70 bool from64; // True if the exception is generated from the AArch64 state
71 bool to64; // True if the exception is taken in AArch64 state
72 ExceptionLevel fromEL; // Source exception level
73 ExceptionLevel toEL; // Target exception level
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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66 ExtMachInst machInst;
67 uint32_t issRaw;
68
69 // Helper variables for ARMv8 exception handling
70 bool from64; // True if the exception is generated from the AArch64 state
71 bool to64; // True if the exception is taken in AArch64 state
72 ExceptionLevel fromEL; // Source exception level
73 ExceptionLevel toEL; // Target exception level
74 OperatingMode fromMode; // Source operating mode
74 OperatingMode fromMode; // Source operating mode (aarch32)
75 OperatingMode toMode; // Next operating mode (aarch32)
75
76
77 // This variable is true if the above fault specific informations
78 // have been updated. This is to prevent that a client is using their
79 // un-updated default constructed value.
80 bool faultUpdated;
81
76 bool hypRouted; // True if the fault has been routed to Hypervisor
77
78 Addr getVector(ThreadContext *tc);
79 Addr getVector64(ThreadContext *tc);
80
81 public:
82 /// Generic fault source enums used to index into
83 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based

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186 armPcOffset(armPcOffset_), thumbPcOffset(thumbPcOffset_),
187 armPcElrOffset(armPcElrOffset_), thumbPcElrOffset(thumbPcElrOffset_),
188 hypTrappable(hypTrappable_), abortDisable(abortDisable_),
189 fiqDisable(fiqDisable_), ec(ec_) {}
190 };
191
192 ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
193 machInst(_machInst), issRaw(_iss), from64(false), to64(false),
82 bool hypRouted; // True if the fault has been routed to Hypervisor
83
84 Addr getVector(ThreadContext *tc);
85 Addr getVector64(ThreadContext *tc);
86
87 public:
88 /// Generic fault source enums used to index into
89 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based

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192 armPcOffset(armPcOffset_), thumbPcOffset(thumbPcOffset_),
193 armPcElrOffset(armPcElrOffset_), thumbPcElrOffset(thumbPcElrOffset_),
194 hypTrappable(hypTrappable_), abortDisable(abortDisable_),
195 fiqDisable(fiqDisable_), ec(ec_) {}
196 };
197
198 ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
199 machInst(_machInst), issRaw(_iss), from64(false), to64(false),
194 fromEL(EL0), toEL(EL0), fromMode(MODE_UNDEFINED), hypRouted(false) {}
200 fromEL(EL0), toEL(EL0), fromMode(MODE_UNDEFINED),
201 faultUpdated(false), hypRouted(false) {}
195
196 // Returns the actual syndrome register to use based on the target
197 // exception level
198 MiscRegIndex getSyndromeReg64() const;
199 // Returns the actual fault address register to use based on the target
200 // exception level
201 MiscRegIndex getFaultAddrReg64() const;
202
203 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
204 StaticInst::nullStaticInstPtr) override;
205 void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
206 StaticInst::nullStaticInstPtr);
202
203 // Returns the actual syndrome register to use based on the target
204 // exception level
205 MiscRegIndex getSyndromeReg64() const;
206 // Returns the actual fault address register to use based on the target
207 // exception level
208 MiscRegIndex getFaultAddrReg64() const;
209
210 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
211 StaticInst::nullStaticInstPtr) override;
212 void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
213 StaticInst::nullStaticInstPtr);
214 void update(ThreadContext *tc);
207 virtual void annotate(AnnotationIDs id, uint64_t val) {}
208 virtual FaultStat& countStat() = 0;
209 virtual FaultOffset offset(ThreadContext *tc) = 0;
210 virtual FaultOffset offset64(ThreadContext *tc) = 0;
211 virtual OperatingMode nextMode() = 0;
212 virtual bool routeToMonitor(ThreadContext *tc) const = 0;
213 virtual bool routeToHyp(ThreadContext *tc) const { return false; }
214 virtual uint8_t armPcOffset(bool isHyp) = 0;

--- 398 unchanged lines hidden --- 		215 virtual void annotate(AnnotationIDs id, uint64_t val) {}
216 virtual FaultStat& countStat() = 0;
217 virtual FaultOffset offset(ThreadContext *tc) = 0;
218 virtual FaultOffset offset64(ThreadContext *tc) = 0;
219 virtual OperatingMode nextMode() = 0;
220 virtual bool routeToMonitor(ThreadContext *tc) const = 0;
221 virtual bool routeToHyp(ThreadContext *tc) const { return false; }
222 virtual uint8_t armPcOffset(bool isHyp) = 0;

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