faults.hh (12334:e0ab29a34764) faults.hh (12402:a90842ce2303)
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 59 unchanged lines hidden (view full) ---

68
69 // Helper variables for ARMv8 exception handling
70 bool from64; // True if the exception is generated from the AArch64 state
71 bool to64; // True if the exception is taken in AArch64 state
72 ExceptionLevel fromEL; // Source exception level
73 ExceptionLevel toEL; // Target exception level
74 OperatingMode fromMode; // Source operating mode
75
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 59 unchanged lines hidden (view full) ---

68
69 // Helper variables for ARMv8 exception handling
70 bool from64; // True if the exception is generated from the AArch64 state
71 bool to64; // True if the exception is taken in AArch64 state
72 ExceptionLevel fromEL; // Source exception level
73 ExceptionLevel toEL; // Target exception level
74 OperatingMode fromMode; // Source operating mode
75
76 bool hypRouted; // True if the fault has been routed to Hypervisor
77
76 Addr getVector(ThreadContext *tc);
77 Addr getVector64(ThreadContext *tc);
78
79 public:
80 /// Generic fault source enums used to index into
81 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based
82 /// on the current register width state and the translation table format in
83 /// use

--- 84 unchanged lines hidden (view full) ---

168 // (exceptions taken in HYP mode or in AArch64 state)
169 const ExceptionClass ec;
170
171 FaultStat count;
172 };
173
174 ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
175 machInst(_machInst), issRaw(_iss), from64(false), to64(false),
78 Addr getVector(ThreadContext *tc);
79 Addr getVector64(ThreadContext *tc);
80
81 public:
82 /// Generic fault source enums used to index into
83 /// {short/long/aarch64}DescFaultSources[] to get the actual encodings based
84 /// on the current register width state and the translation table format in
85 /// use

--- 84 unchanged lines hidden (view full) ---

170 // (exceptions taken in HYP mode or in AArch64 state)
171 const ExceptionClass ec;
172
173 FaultStat count;
174 };
175
176 ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
177 machInst(_machInst), issRaw(_iss), from64(false), to64(false),
176 fromEL(EL0), toEL(EL0), fromMode(MODE_UNDEFINED) {}
178 fromEL(EL0), toEL(EL0), fromMode(MODE_UNDEFINED), hypRouted(false) {}
177
178 // Returns the actual syndrome register to use based on the target
179 // exception level
180 MiscRegIndex getSyndromeReg64() const;
181 // Returns the actual fault address register to use based on the target
182 // exception level
183 MiscRegIndex getFaultAddrReg64() const;
184

--- 417 unchanged lines hidden --- 		179
180 // Returns the actual syndrome register to use based on the target
181 // exception level
182 MiscRegIndex getSyndromeReg64() const;
183 // Returns the actual fault address register to use based on the target
184 // exception level
185 MiscRegIndex getFaultAddrReg64() const;
186

--- 417 unchanged lines hidden ---