faults.hh (12032:d218c2fe9440) faults.hh (12176:4282f755a69a)
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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178 // Returns the actual syndrome register to use based on the target
179 // exception level
180 MiscRegIndex getSyndromeReg64() const;
181 // Returns the actual fault address register to use based on the target
182 // exception level
183 MiscRegIndex getFaultAddrReg64() const;
184
185 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
1/*
2 * Copyright (c) 2010, 2012-2013, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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178 // Returns the actual syndrome register to use based on the target
179 // exception level
180 MiscRegIndex getSyndromeReg64() const;
181 // Returns the actual fault address register to use based on the target
182 // exception level
183 MiscRegIndex getFaultAddrReg64() const;
184
185 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
186 StaticInst::nullStaticInstPtr);
186 StaticInst::nullStaticInstPtr) override;
187 void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
188 StaticInst::nullStaticInstPtr);
189 virtual void annotate(AnnotationIDs id, uint64_t val) {}
190 virtual FaultStat& countStat() = 0;
191 virtual FaultOffset offset(ThreadContext *tc) = 0;
192 virtual FaultOffset offset64() = 0;
193 virtual OperatingMode nextMode() = 0;
194 virtual bool routeToMonitor(ThreadContext *tc) const = 0;

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210class ArmFaultVals : public ArmFault
211{
212 protected:
213 static FaultVals vals;
214
215 public:
216 ArmFaultVals<T>(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
217 ArmFault(_machInst, _iss) {}
187 void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
188 StaticInst::nullStaticInstPtr);
189 virtual void annotate(AnnotationIDs id, uint64_t val) {}
190 virtual FaultStat& countStat() = 0;
191 virtual FaultOffset offset(ThreadContext *tc) = 0;
192 virtual FaultOffset offset64() = 0;
193 virtual OperatingMode nextMode() = 0;
194 virtual bool routeToMonitor(ThreadContext *tc) const = 0;

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210class ArmFaultVals : public ArmFault
211{
212 protected:
213 static FaultVals vals;
214
215 public:
216 ArmFaultVals<T>(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
217 ArmFault(_machInst, _iss) {}
218 FaultName name() const { return vals.name; }
219 FaultStat & countStat() { return vals.count; }
220 FaultOffset offset(ThreadContext *tc);
218 FaultName name() const override { return vals.name; }
219 FaultStat & countStat() override { return vals.count; }
220 FaultOffset offset(ThreadContext *tc) override;
221
221
222 FaultOffset
223 offset64()
224 {
222 FaultOffset offset64() override {
225 if (toEL == fromEL) {
226 if (opModeIsT(fromMode))
227 return vals.currELTOffset;
228 return vals.currELHOffset;
229 } else {
230 if (from64)
231 return vals.lowerEL64Offset;
232 return vals.lowerEL32Offset;
233 }
234 }
235
223 if (toEL == fromEL) {
224 if (opModeIsT(fromMode))
225 return vals.currELTOffset;
226 return vals.currELHOffset;
227 } else {
228 if (from64)
229 return vals.lowerEL64Offset;
230 return vals.lowerEL32Offset;
231 }
232 }
233
236 OperatingMode nextMode() { return vals.nextMode; }
237 virtual bool routeToMonitor(ThreadContext *tc) const { return false; }
238 uint8_t armPcOffset(bool isHyp) { return isHyp ? vals.armPcElrOffset
239 : vals.armPcOffset; }
240 uint8_t thumbPcOffset(bool isHyp) { return isHyp ? vals.thumbPcElrOffset
241 : vals.thumbPcOffset; }
242 uint8_t armPcElrOffset() { return vals.armPcElrOffset; }
243 uint8_t thumbPcElrOffset() { return vals.thumbPcElrOffset; }
244 virtual bool abortDisable(ThreadContext* tc) { return vals.abortDisable; }
245 virtual bool fiqDisable(ThreadContext* tc) { return vals.fiqDisable; }
246 virtual ExceptionClass ec(ThreadContext *tc) const { return vals.ec; }
247 virtual uint32_t iss() const { return issRaw; }
234 OperatingMode nextMode() override { return vals.nextMode; }
235 virtual bool routeToMonitor(ThreadContext *tc) const override {
236 return false;
237 }
238 uint8_t armPcOffset(bool isHyp) override {
239 return isHyp ? vals.armPcElrOffset
240 : vals.armPcOffset;
241 }
242 uint8_t thumbPcOffset(bool isHyp) override {
243 return isHyp ? vals.thumbPcElrOffset
244 : vals.thumbPcOffset;
245 }
246 uint8_t armPcElrOffset() override { return vals.armPcElrOffset; }
247 uint8_t thumbPcElrOffset() override { return vals.thumbPcElrOffset; }
248 bool abortDisable(ThreadContext* tc) override { return vals.abortDisable; }
249 bool fiqDisable(ThreadContext* tc) override { return vals.fiqDisable; }
250 ExceptionClass ec(ThreadContext *tc) const override { return vals.ec; }
251 uint32_t iss() const override { return issRaw; }
248};
249
250class Reset : public ArmFaultVals<Reset>
251{
252 public:
253 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
252};
253
254class Reset : public ArmFaultVals<Reset>
255{
256 public:
257 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
254 StaticInst::nullStaticInstPtr);
258 StaticInst::nullStaticInstPtr) override;
255};
256
257class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
258{
259 protected:
260 bool unknown;
261 bool disabled;
262 ExceptionClass overrideEc;

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274 UndefinedInstruction(ExtMachInst _machInst, uint32_t _iss,
275 ExceptionClass _overrideEc, const char *_mnemonic = NULL) :
276 ArmFaultVals<UndefinedInstruction>(_machInst, _iss),
277 unknown(false), disabled(true), overrideEc(_overrideEc),
278 mnemonic(_mnemonic)
279 {}
280
281 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
259};
260
261class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
262{
263 protected:
264 bool unknown;
265 bool disabled;
266 ExceptionClass overrideEc;

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278 UndefinedInstruction(ExtMachInst _machInst, uint32_t _iss,
279 ExceptionClass _overrideEc, const char *_mnemonic = NULL) :
280 ArmFaultVals<UndefinedInstruction>(_machInst, _iss),
281 unknown(false), disabled(true), overrideEc(_overrideEc),
282 mnemonic(_mnemonic)
283 {}
284
285 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
282 StaticInst::nullStaticInstPtr);
283 bool routeToHyp(ThreadContext *tc) const;
284 ExceptionClass ec(ThreadContext *tc) const;
285 uint32_t iss() const;
286 StaticInst::nullStaticInstPtr) override;
287 bool routeToHyp(ThreadContext *tc) const override;
288 ExceptionClass ec(ThreadContext *tc) const override;
289 uint32_t iss() const override;
286};
287
288class SupervisorCall : public ArmFaultVals<SupervisorCall>
289{
290 protected:
291 ExceptionClass overrideEc;
292 public:
293 SupervisorCall(ExtMachInst _machInst, uint32_t _iss,
294 ExceptionClass _overrideEc = EC_INVALID) :
295 ArmFaultVals<SupervisorCall>(_machInst, _iss),
296 overrideEc(_overrideEc)
297 {}
298
299 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
290};
291
292class SupervisorCall : public ArmFaultVals<SupervisorCall>
293{
294 protected:
295 ExceptionClass overrideEc;
296 public:
297 SupervisorCall(ExtMachInst _machInst, uint32_t _iss,
298 ExceptionClass _overrideEc = EC_INVALID) :
299 ArmFaultVals<SupervisorCall>(_machInst, _iss),
300 overrideEc(_overrideEc)
301 {}
302
303 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
300 StaticInst::nullStaticInstPtr);
301 bool routeToHyp(ThreadContext *tc) const;
302 ExceptionClass ec(ThreadContext *tc) const;
303 uint32_t iss() const;
304 StaticInst::nullStaticInstPtr) override;
305 bool routeToHyp(ThreadContext *tc) const override;
306 ExceptionClass ec(ThreadContext *tc) const override;
307 uint32_t iss() const override;
304};
305
306class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall>
307{
308 public:
309 SecureMonitorCall(ExtMachInst _machInst) :
310 ArmFaultVals<SecureMonitorCall>(_machInst)
311 {}
312
313 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
308};
309
310class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall>
311{
312 public:
313 SecureMonitorCall(ExtMachInst _machInst) :
314 ArmFaultVals<SecureMonitorCall>(_machInst)
315 {}
316
317 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
314 StaticInst::nullStaticInstPtr);
315 ExceptionClass ec(ThreadContext *tc) const;
316 uint32_t iss() const;
318 StaticInst::nullStaticInstPtr) override;
319 ExceptionClass ec(ThreadContext *tc) const override;
320 uint32_t iss() const override;
317};
318
319class SupervisorTrap : public ArmFaultVals<SupervisorTrap>
320{
321 protected:
322 ExtMachInst machInst;
323 ExceptionClass overrideEc;
324
325 public:
326 SupervisorTrap(ExtMachInst _machInst, uint32_t _iss,
327 ExceptionClass _overrideEc = EC_INVALID) :
328 ArmFaultVals<SupervisorTrap>(_machInst, _iss),
329 overrideEc(_overrideEc)
330 {}
331
321};
322
323class SupervisorTrap : public ArmFaultVals<SupervisorTrap>
324{
325 protected:
326 ExtMachInst machInst;
327 ExceptionClass overrideEc;
328
329 public:
330 SupervisorTrap(ExtMachInst _machInst, uint32_t _iss,
331 ExceptionClass _overrideEc = EC_INVALID) :
332 ArmFaultVals<SupervisorTrap>(_machInst, _iss),
333 overrideEc(_overrideEc)
334 {}
335
332 ExceptionClass ec(ThreadContext *tc) const;
336 ExceptionClass ec(ThreadContext *tc) const override;
333};
334
335class SecureMonitorTrap : public ArmFaultVals<SecureMonitorTrap>
336{
337 protected:
338 ExtMachInst machInst;
339 ExceptionClass overrideEc;
340
341 public:
342 SecureMonitorTrap(ExtMachInst _machInst, uint32_t _iss,
343 ExceptionClass _overrideEc = EC_INVALID) :
344 ArmFaultVals<SecureMonitorTrap>(_machInst, _iss),
345 overrideEc(_overrideEc)
346 {}
347
337};
338
339class SecureMonitorTrap : public ArmFaultVals<SecureMonitorTrap>
340{
341 protected:
342 ExtMachInst machInst;
343 ExceptionClass overrideEc;
344
345 public:
346 SecureMonitorTrap(ExtMachInst _machInst, uint32_t _iss,
347 ExceptionClass _overrideEc = EC_INVALID) :
348 ArmFaultVals<SecureMonitorTrap>(_machInst, _iss),
349 overrideEc(_overrideEc)
350 {}
351
348 ExceptionClass ec(ThreadContext *tc) const;
352 ExceptionClass ec(ThreadContext *tc) const override;
349};
350
351class HypervisorCall : public ArmFaultVals<HypervisorCall>
352{
353 public:
354 HypervisorCall(ExtMachInst _machInst, uint32_t _imm);
355
353};
354
355class HypervisorCall : public ArmFaultVals<HypervisorCall>
356{
357 public:
358 HypervisorCall(ExtMachInst _machInst, uint32_t _imm);
359
356 ExceptionClass ec(ThreadContext *tc) const;
360 ExceptionClass ec(ThreadContext *tc) const override;
357};
358
359class HypervisorTrap : public ArmFaultVals<HypervisorTrap>
360{
361 protected:
362 ExtMachInst machInst;
363 ExceptionClass overrideEc;
364
365 public:
366 HypervisorTrap(ExtMachInst _machInst, uint32_t _iss,
367 ExceptionClass _overrideEc = EC_INVALID) :
368 ArmFaultVals<HypervisorTrap>(_machInst, _iss),
369 overrideEc(_overrideEc)
370 {}
371
361};
362
363class HypervisorTrap : public ArmFaultVals<HypervisorTrap>
364{
365 protected:
366 ExtMachInst machInst;
367 ExceptionClass overrideEc;
368
369 public:
370 HypervisorTrap(ExtMachInst _machInst, uint32_t _iss,
371 ExceptionClass _overrideEc = EC_INVALID) :
372 ArmFaultVals<HypervisorTrap>(_machInst, _iss),
373 overrideEc(_overrideEc)
374 {}
375
372 ExceptionClass ec(ThreadContext *tc) const;
376 ExceptionClass ec(ThreadContext *tc) const override;
373};
374
375template <class T>
376class AbortFault : public ArmFaultVals<T>
377{
378 protected:
379 /**
380 * The virtual address the fault occured at. If 2 stages of

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402 uint8_t _source, bool _stage2,
403 ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
404 faultAddr(_faultAddr), OVAddr(0), write(_write),
405 domain(_domain), source(_source), srcEncoded(0),
406 stage2(_stage2), s1ptw(false), tranMethod(_tranMethod)
407 {}
408
409 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
377};
378
379template <class T>
380class AbortFault : public ArmFaultVals<T>
381{
382 protected:
383 /**
384 * The virtual address the fault occured at. If 2 stages of

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406 uint8_t _source, bool _stage2,
407 ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
408 faultAddr(_faultAddr), OVAddr(0), write(_write),
409 domain(_domain), source(_source), srcEncoded(0),
410 stage2(_stage2), s1ptw(false), tranMethod(_tranMethod)
411 {}
412
413 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
410 StaticInst::nullStaticInstPtr);
414 StaticInst::nullStaticInstPtr) override;
411
415
412 FSR getFsr(ThreadContext *tc);
413 bool abortDisable(ThreadContext *tc);
414 uint32_t iss() const;
415 bool isStage2() const { return stage2; }
416 void annotate(ArmFault::AnnotationIDs id, uint64_t val);
416 FSR getFsr(ThreadContext *tc) override;
417 bool abortDisable(ThreadContext *tc) override;
418 uint32_t iss() const override;
419 bool isStage2() const override { return stage2; }
420 void annotate(ArmFault::AnnotationIDs id, uint64_t val) override;
417 bool isMMUFault() const;
418};
419
420class PrefetchAbort : public AbortFault<PrefetchAbort>
421{
422 public:
423 static const MiscRegIndex FsrIndex = MISCREG_IFSR;
424 static const MiscRegIndex FarIndex = MISCREG_IFAR;
425 static const MiscRegIndex HFarIndex = MISCREG_HIFAR;
426
427 PrefetchAbort(Addr _addr, uint8_t _source, bool _stage2 = false,
428 ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
429 AbortFault<PrefetchAbort>(_addr, false, TlbEntry::DomainType::NoAccess,
430 _source, _stage2, _tranMethod)
431 {}
432
421 bool isMMUFault() const;
422};
423
424class PrefetchAbort : public AbortFault<PrefetchAbort>
425{
426 public:
427 static const MiscRegIndex FsrIndex = MISCREG_IFSR;
428 static const MiscRegIndex FarIndex = MISCREG_IFAR;
429 static const MiscRegIndex HFarIndex = MISCREG_HIFAR;
430
431 PrefetchAbort(Addr _addr, uint8_t _source, bool _stage2 = false,
432 ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
433 AbortFault<PrefetchAbort>(_addr, false, TlbEntry::DomainType::NoAccess,
434 _source, _stage2, _tranMethod)
435 {}
436
433 ExceptionClass ec(ThreadContext *tc) const;
437 ExceptionClass ec(ThreadContext *tc) const override;
434 // @todo: external aborts should be routed if SCR.EA == 1
438 // @todo: external aborts should be routed if SCR.EA == 1
435 bool routeToMonitor(ThreadContext *tc) const;
436 bool routeToHyp(ThreadContext *tc) const;
439 bool routeToMonitor(ThreadContext *tc) const override;
440 bool routeToHyp(ThreadContext *tc) const override;
437};
438
439class DataAbort : public AbortFault<DataAbort>
440{
441 public:
442 static const MiscRegIndex FsrIndex = MISCREG_DFSR;
443 static const MiscRegIndex FarIndex = MISCREG_DFAR;
444 static const MiscRegIndex HFarIndex = MISCREG_HDFAR;

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453
454 DataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write, uint8_t _source,
455 bool _stage2 = false, ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
456 AbortFault<DataAbort>(_addr, _write, _domain, _source, _stage2,
457 _tranMethod),
458 isv(false), sas (0), sse(0), srt(0), sf(false), ar(false)
459 {}
460
441};
442
443class DataAbort : public AbortFault<DataAbort>
444{
445 public:
446 static const MiscRegIndex FsrIndex = MISCREG_DFSR;
447 static const MiscRegIndex FarIndex = MISCREG_DFAR;
448 static const MiscRegIndex HFarIndex = MISCREG_HDFAR;

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457
458 DataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write, uint8_t _source,
459 bool _stage2 = false, ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) :
460 AbortFault<DataAbort>(_addr, _write, _domain, _source, _stage2,
461 _tranMethod),
462 isv(false), sas (0), sse(0), srt(0), sf(false), ar(false)
463 {}
464
461 ExceptionClass ec(ThreadContext *tc) const;
465 ExceptionClass ec(ThreadContext *tc) const override;
462 // @todo: external aborts should be routed if SCR.EA == 1
466 // @todo: external aborts should be routed if SCR.EA == 1
463 bool routeToMonitor(ThreadContext *tc) const;
464 bool routeToHyp(ThreadContext *tc) const;
465 uint32_t iss() const;
466 void annotate(AnnotationIDs id, uint64_t val);
467 bool routeToMonitor(ThreadContext *tc) const override;
468 bool routeToHyp(ThreadContext *tc) const override;
469 uint32_t iss() const override;
470 void annotate(AnnotationIDs id, uint64_t val) override;
467};
468
469class VirtualDataAbort : public AbortFault<VirtualDataAbort>
470{
471 public:
472 static const MiscRegIndex FsrIndex = MISCREG_DFSR;
473 static const MiscRegIndex FarIndex = MISCREG_DFAR;
474 static const MiscRegIndex HFarIndex = MISCREG_HDFAR;
475
476 VirtualDataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write,
477 uint8_t _source) :
478 AbortFault<VirtualDataAbort>(_addr, _write, _domain, _source, false)
479 {}
480
471};
472
473class VirtualDataAbort : public AbortFault<VirtualDataAbort>
474{
475 public:
476 static const MiscRegIndex FsrIndex = MISCREG_DFSR;
477 static const MiscRegIndex FarIndex = MISCREG_DFAR;
478 static const MiscRegIndex HFarIndex = MISCREG_HDFAR;
479
480 VirtualDataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write,
481 uint8_t _source) :
482 AbortFault<VirtualDataAbort>(_addr, _write, _domain, _source, false)
483 {}
484
481 void invoke(ThreadContext *tc, const StaticInstPtr &inst);
485 void invoke(ThreadContext *tc, const StaticInstPtr &inst) override;
482};
483
484class Interrupt : public ArmFaultVals<Interrupt>
485{
486 public:
486};
487
488class Interrupt : public ArmFaultVals<Interrupt>
489{
490 public:
487 bool routeToMonitor(ThreadContext *tc) const;
488 bool routeToHyp(ThreadContext *tc) const;
489 bool abortDisable(ThreadContext *tc);
491 bool routeToMonitor(ThreadContext *tc) const override;
492 bool routeToHyp(ThreadContext *tc) const override;
493 bool abortDisable(ThreadContext *tc) override;
490};
491
492class VirtualInterrupt : public ArmFaultVals<VirtualInterrupt>
493{
494 public:
495 VirtualInterrupt();
496};
497
498class FastInterrupt : public ArmFaultVals<FastInterrupt>
499{
500 public:
494};
495
496class VirtualInterrupt : public ArmFaultVals<VirtualInterrupt>
497{
498 public:
499 VirtualInterrupt();
500};
501
502class FastInterrupt : public ArmFaultVals<FastInterrupt>
503{
504 public:
501 bool routeToMonitor(ThreadContext *tc) const;
502 bool routeToHyp(ThreadContext *tc) const;
503 bool abortDisable(ThreadContext *tc);
504 bool fiqDisable(ThreadContext *tc);
505 bool routeToMonitor(ThreadContext *tc) const override;
506 bool routeToHyp(ThreadContext *tc) const override;
507 bool abortDisable(ThreadContext *tc) override;
508 bool fiqDisable(ThreadContext *tc) override;
505};
506
507class VirtualFastInterrupt : public ArmFaultVals<VirtualFastInterrupt>
508{
509 public:
510 VirtualFastInterrupt();
511};
512
513/// PC alignment fault (AArch64 only)
514class PCAlignmentFault : public ArmFaultVals<PCAlignmentFault>
515{
516 protected:
517 /// The unaligned value of the PC
518 Addr faultPC;
519 public:
520 PCAlignmentFault(Addr _faultPC) : faultPC(_faultPC)
521 {}
522 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
509};
510
511class VirtualFastInterrupt : public ArmFaultVals<VirtualFastInterrupt>
512{
513 public:
514 VirtualFastInterrupt();
515};
516
517/// PC alignment fault (AArch64 only)
518class PCAlignmentFault : public ArmFaultVals<PCAlignmentFault>
519{
520 protected:
521 /// The unaligned value of the PC
522 Addr faultPC;
523 public:
524 PCAlignmentFault(Addr _faultPC) : faultPC(_faultPC)
525 {}
526 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
523 StaticInst::nullStaticInstPtr);
527 StaticInst::nullStaticInstPtr) override;
524};
525
526/// Stack pointer alignment fault (AArch64 only)
527class SPAlignmentFault : public ArmFaultVals<SPAlignmentFault>
528{
529 public:
530 SPAlignmentFault();
531};
532
533/// System error (AArch64 only)
534class SystemError : public ArmFaultVals<SystemError>
535{
536 public:
537 SystemError();
538 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
528};
529
530/// Stack pointer alignment fault (AArch64 only)
531class SPAlignmentFault : public ArmFaultVals<SPAlignmentFault>
532{
533 public:
534 SPAlignmentFault();
535};
536
537/// System error (AArch64 only)
538class SystemError : public ArmFaultVals<SystemError>
539{
540 public:
541 SystemError();
542 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
539 StaticInst::nullStaticInstPtr);
540 bool routeToMonitor(ThreadContext *tc) const;
541 bool routeToHyp(ThreadContext *tc) const;
543 StaticInst::nullStaticInstPtr) override;
544 bool routeToMonitor(ThreadContext *tc) const override;
545 bool routeToHyp(ThreadContext *tc) const override;
542};
543
544// A fault that flushes the pipe, excluding the faulting instructions
545class FlushPipe : public ArmFaultVals<FlushPipe>
546{
547 public:
548 FlushPipe() {}
549 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
546};
547
548// A fault that flushes the pipe, excluding the faulting instructions
549class FlushPipe : public ArmFaultVals<FlushPipe>
550{
551 public:
552 FlushPipe() {}
553 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
550 StaticInst::nullStaticInstPtr);
554 StaticInst::nullStaticInstPtr) override;
551};
552
553// A fault that flushes the pipe, excluding the faulting instructions
554class ArmSev : public ArmFaultVals<ArmSev>
555{
556 public:
557 ArmSev () {}
558 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
555};
556
557// A fault that flushes the pipe, excluding the faulting instructions
558class ArmSev : public ArmFaultVals<ArmSev>
559{
560 public:
561 ArmSev () {}
562 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
559 StaticInst::nullStaticInstPtr);
563 StaticInst::nullStaticInstPtr) override;
560};
561
562/// Illegal Instruction Set State fault (AArch64 only)
563class IllegalInstSetStateFault : public ArmFaultVals<IllegalInstSetStateFault>
564{
565 public:
566 IllegalInstSetStateFault();
567};

--- 30 unchanged lines hidden --- 		564};
565
566/// Illegal Instruction Set State fault (AArch64 only)
567class IllegalInstSetStateFault : public ArmFaultVals<IllegalInstSetStateFault>
568{
569 public:
570 IllegalInstSetStateFault();
571};

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