faults.hh (10205:3ca67d0e0e7e) | faults.hh (10417:710ee116eb68) |
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1/* 2 * Copyright (c) 2010, 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 167 unchanged lines hidden (view full) --- 176 177 // Returns the actual syndrome register to use based on the target 178 // exception level 179 MiscRegIndex getSyndromeReg64() const; 180 // Returns the actual fault address register to use based on the target 181 // exception level 182 MiscRegIndex getFaultAddrReg64() const; 183 | 1/* 2 * Copyright (c) 2010, 2012-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 167 unchanged lines hidden (view full) --- 176 177 // Returns the actual syndrome register to use based on the target 178 // exception level 179 MiscRegIndex getSyndromeReg64() const; 180 // Returns the actual fault address register to use based on the target 181 // exception level 182 MiscRegIndex getFaultAddrReg64() const; 183 |
184 void invoke(ThreadContext *tc, 185 StaticInstPtr inst = StaticInst::nullStaticInstPtr); 186 void invoke64(ThreadContext *tc, 187 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 184 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 185 StaticInst::nullStaticInstPtr); 186 void invoke64(ThreadContext *tc, const StaticInstPtr &inst = 187 StaticInst::nullStaticInstPtr); |
188 virtual void annotate(AnnotationIDs id, uint64_t val) {} 189 virtual FaultStat& countStat() = 0; 190 virtual FaultOffset offset(ThreadContext *tc) = 0; 191 virtual FaultOffset offset64() = 0; 192 virtual OperatingMode nextMode() = 0; 193 virtual bool routeToMonitor(ThreadContext *tc) const = 0; 194 virtual bool routeToHyp(ThreadContext *tc) const { return false; } 195 virtual uint8_t armPcOffset(bool isHyp) = 0; --- 48 unchanged lines hidden (view full) --- 244 virtual bool fiqDisable(ThreadContext* tc) { return vals.fiqDisable; } 245 virtual ExceptionClass ec(ThreadContext *tc) const { return vals.ec; } 246 virtual uint32_t iss() const { return issRaw; } 247}; 248 249class Reset : public ArmFaultVals<Reset> 250{ 251 public: | 188 virtual void annotate(AnnotationIDs id, uint64_t val) {} 189 virtual FaultStat& countStat() = 0; 190 virtual FaultOffset offset(ThreadContext *tc) = 0; 191 virtual FaultOffset offset64() = 0; 192 virtual OperatingMode nextMode() = 0; 193 virtual bool routeToMonitor(ThreadContext *tc) const = 0; 194 virtual bool routeToHyp(ThreadContext *tc) const { return false; } 195 virtual uint8_t armPcOffset(bool isHyp) = 0; --- 48 unchanged lines hidden (view full) --- 244 virtual bool fiqDisable(ThreadContext* tc) { return vals.fiqDisable; } 245 virtual ExceptionClass ec(ThreadContext *tc) const { return vals.ec; } 246 virtual uint32_t iss() const { return issRaw; } 247}; 248 249class Reset : public ArmFaultVals<Reset> 250{ 251 public: |
252 void invoke(ThreadContext *tc, 253 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 252 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 253 StaticInst::nullStaticInstPtr); |
254}; 255 256class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction> 257{ 258 protected: 259 bool unknown; 260 bool disabled; 261 ExceptionClass overrideEc; --- 10 unchanged lines hidden (view full) --- 272 {} 273 UndefinedInstruction(ExtMachInst _machInst, uint32_t _iss, 274 ExceptionClass _overrideEc, const char *_mnemonic = NULL) : 275 ArmFaultVals<UndefinedInstruction>(_machInst, _iss), 276 unknown(false), disabled(true), overrideEc(_overrideEc), 277 mnemonic(_mnemonic) 278 {} 279 | 254}; 255 256class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction> 257{ 258 protected: 259 bool unknown; 260 bool disabled; 261 ExceptionClass overrideEc; --- 10 unchanged lines hidden (view full) --- 272 {} 273 UndefinedInstruction(ExtMachInst _machInst, uint32_t _iss, 274 ExceptionClass _overrideEc, const char *_mnemonic = NULL) : 275 ArmFaultVals<UndefinedInstruction>(_machInst, _iss), 276 unknown(false), disabled(true), overrideEc(_overrideEc), 277 mnemonic(_mnemonic) 278 {} 279 |
280 void invoke(ThreadContext *tc, 281 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 280 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 281 StaticInst::nullStaticInstPtr); |
282 bool routeToHyp(ThreadContext *tc) const; 283 ExceptionClass ec(ThreadContext *tc) const; 284 uint32_t iss() const; 285}; 286 287class SupervisorCall : public ArmFaultVals<SupervisorCall> 288{ 289 protected: 290 ExceptionClass overrideEc; 291 public: 292 SupervisorCall(ExtMachInst _machInst, uint32_t _iss, 293 ExceptionClass _overrideEc = EC_INVALID) : 294 ArmFaultVals<SupervisorCall>(_machInst, _iss), 295 overrideEc(_overrideEc) 296 {} 297 | 282 bool routeToHyp(ThreadContext *tc) const; 283 ExceptionClass ec(ThreadContext *tc) const; 284 uint32_t iss() const; 285}; 286 287class SupervisorCall : public ArmFaultVals<SupervisorCall> 288{ 289 protected: 290 ExceptionClass overrideEc; 291 public: 292 SupervisorCall(ExtMachInst _machInst, uint32_t _iss, 293 ExceptionClass _overrideEc = EC_INVALID) : 294 ArmFaultVals<SupervisorCall>(_machInst, _iss), 295 overrideEc(_overrideEc) 296 {} 297 |
298 void invoke(ThreadContext *tc, 299 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 298 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 299 StaticInst::nullStaticInstPtr); |
300 bool routeToHyp(ThreadContext *tc) const; 301 ExceptionClass ec(ThreadContext *tc) const; 302 uint32_t iss() const; 303}; 304 305class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall> 306{ 307 public: 308 SecureMonitorCall(ExtMachInst _machInst) : 309 ArmFaultVals<SecureMonitorCall>(_machInst) 310 {} 311 | 300 bool routeToHyp(ThreadContext *tc) const; 301 ExceptionClass ec(ThreadContext *tc) const; 302 uint32_t iss() const; 303}; 304 305class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall> 306{ 307 public: 308 SecureMonitorCall(ExtMachInst _machInst) : 309 ArmFaultVals<SecureMonitorCall>(_machInst) 310 {} 311 |
312 void invoke(ThreadContext *tc, 313 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 312 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 313 StaticInst::nullStaticInstPtr); |
314 ExceptionClass ec(ThreadContext *tc) const; 315 uint32_t iss() const; 316}; 317 318class SupervisorTrap : public ArmFaultVals<SupervisorTrap> 319{ 320 protected: 321 ExtMachInst machInst; --- 74 unchanged lines hidden (view full) --- 396 397 public: 398 AbortFault(Addr _faultAddr, bool _write, TlbEntry::DomainType _domain, uint8_t _source, 399 bool _stage2, ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) : 400 faultAddr(_faultAddr), write(_write), domain(_domain), source(_source), 401 stage2(_stage2), s1ptw(false), tranMethod(_tranMethod) 402 {} 403 | 314 ExceptionClass ec(ThreadContext *tc) const; 315 uint32_t iss() const; 316}; 317 318class SupervisorTrap : public ArmFaultVals<SupervisorTrap> 319{ 320 protected: 321 ExtMachInst machInst; --- 74 unchanged lines hidden (view full) --- 396 397 public: 398 AbortFault(Addr _faultAddr, bool _write, TlbEntry::DomainType _domain, uint8_t _source, 399 bool _stage2, ArmFault::TranMethod _tranMethod = ArmFault::UnknownTran) : 400 faultAddr(_faultAddr), write(_write), domain(_domain), source(_source), 401 stage2(_stage2), s1ptw(false), tranMethod(_tranMethod) 402 {} 403 |
404 void invoke(ThreadContext *tc, 405 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 404 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 405 StaticInst::nullStaticInstPtr); |
406 407 FSR getFsr(ThreadContext *tc); 408 bool abortDisable(ThreadContext *tc); 409 uint32_t iss() const; 410 bool isStage2() const { return stage2; } 411 void annotate(ArmFault::AnnotationIDs id, uint64_t val); 412 bool isMMUFault() const; 413}; --- 54 unchanged lines hidden (view full) --- 468 static const MiscRegIndex FarIndex = MISCREG_DFAR; 469 static const MiscRegIndex HFarIndex = MISCREG_HDFAR; 470 471 VirtualDataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write, 472 uint8_t _source) : 473 AbortFault<VirtualDataAbort>(_addr, _write, _domain, _source, false) 474 {} 475 | 406 407 FSR getFsr(ThreadContext *tc); 408 bool abortDisable(ThreadContext *tc); 409 uint32_t iss() const; 410 bool isStage2() const { return stage2; } 411 void annotate(ArmFault::AnnotationIDs id, uint64_t val); 412 bool isMMUFault() const; 413}; --- 54 unchanged lines hidden (view full) --- 468 static const MiscRegIndex FarIndex = MISCREG_DFAR; 469 static const MiscRegIndex HFarIndex = MISCREG_HDFAR; 470 471 VirtualDataAbort(Addr _addr, TlbEntry::DomainType _domain, bool _write, 472 uint8_t _source) : 473 AbortFault<VirtualDataAbort>(_addr, _write, _domain, _source, false) 474 {} 475 |
476 void invoke(ThreadContext *tc, StaticInstPtr inst); | 476 void invoke(ThreadContext *tc, const StaticInstPtr &inst); |
477}; 478 479class Interrupt : public ArmFaultVals<Interrupt> 480{ 481 public: 482 bool routeToMonitor(ThreadContext *tc) const; 483 bool routeToHyp(ThreadContext *tc) const; 484 bool abortDisable(ThreadContext *tc); --- 24 unchanged lines hidden (view full) --- 509class PCAlignmentFault : public ArmFaultVals<PCAlignmentFault> 510{ 511 protected: 512 /// The unaligned value of the PC 513 Addr faultPC; 514 public: 515 PCAlignmentFault(Addr _faultPC) : faultPC(_faultPC) 516 {} | 477}; 478 479class Interrupt : public ArmFaultVals<Interrupt> 480{ 481 public: 482 bool routeToMonitor(ThreadContext *tc) const; 483 bool routeToHyp(ThreadContext *tc) const; 484 bool abortDisable(ThreadContext *tc); --- 24 unchanged lines hidden (view full) --- 509class PCAlignmentFault : public ArmFaultVals<PCAlignmentFault> 510{ 511 protected: 512 /// The unaligned value of the PC 513 Addr faultPC; 514 public: 515 PCAlignmentFault(Addr _faultPC) : faultPC(_faultPC) 516 {} |
517 void invoke(ThreadContext *tc, 518 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 517 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 518 StaticInst::nullStaticInstPtr); |
519}; 520 521/// Stack pointer alignment fault (AArch64 only) 522class SPAlignmentFault : public ArmFaultVals<SPAlignmentFault> 523{ 524 public: 525 SPAlignmentFault(); 526}; 527 528/// System error (AArch64 only) 529class SystemError : public ArmFaultVals<SystemError> 530{ 531 public: 532 SystemError(); | 519}; 520 521/// Stack pointer alignment fault (AArch64 only) 522class SPAlignmentFault : public ArmFaultVals<SPAlignmentFault> 523{ 524 public: 525 SPAlignmentFault(); 526}; 527 528/// System error (AArch64 only) 529class SystemError : public ArmFaultVals<SystemError> 530{ 531 public: 532 SystemError(); |
533 void invoke(ThreadContext *tc, 534 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 533 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 534 StaticInst::nullStaticInstPtr); |
535 bool routeToMonitor(ThreadContext *tc) const; 536 bool routeToHyp(ThreadContext *tc) const; 537}; 538 539// A fault that flushes the pipe, excluding the faulting instructions 540class FlushPipe : public ArmFaultVals<FlushPipe> 541{ 542 public: 543 FlushPipe() {} | 535 bool routeToMonitor(ThreadContext *tc) const; 536 bool routeToHyp(ThreadContext *tc) const; 537}; 538 539// A fault that flushes the pipe, excluding the faulting instructions 540class FlushPipe : public ArmFaultVals<FlushPipe> 541{ 542 public: 543 FlushPipe() {} |
544 void invoke(ThreadContext *tc, 545 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 544 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 545 StaticInst::nullStaticInstPtr); |
546}; 547 548// A fault that flushes the pipe, excluding the faulting instructions 549class ArmSev : public ArmFaultVals<ArmSev> 550{ 551 public: 552 ArmSev () {} | 546}; 547 548// A fault that flushes the pipe, excluding the faulting instructions 549class ArmSev : public ArmFaultVals<ArmSev> 550{ 551 public: 552 ArmSev () {} |
553 void invoke(ThreadContext *tc, 554 StaticInstPtr inst = StaticInst::nullStaticInstPtr); | 553 void invoke(ThreadContext *tc, const StaticInstPtr &inst = 554 StaticInst::nullStaticInstPtr); |
555}; 556 557/// Illegal Instruction Set State fault (AArch64 only) 558class IllegalInstSetStateFault : public ArmFaultVals<IllegalInstSetStateFault> 559{ 560 public: 561 IllegalInstSetStateFault(); 562}; 563 564} // namespace ArmISA 565 566#endif // __ARM_FAULTS_HH__ | 555}; 556 557/// Illegal Instruction Set State fault (AArch64 only) 558class IllegalInstSetStateFault : public ArmFaultVals<IllegalInstSetStateFault> 559{ 560 public: 561 IllegalInstSetStateFault(); 562}; 563 564} // namespace ArmISA 565 566#endif // __ARM_FAULTS_HH__ |