1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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70 DebugEvent = 0x2,
71 AccessFlag0 = 0x3,
72 InstructionCacheMaintenance = 0x4,
73 Translation0 = 0x5,
74 AccessFlag1 = 0x6,
75 Translation1 = 0x7,
76 SynchronousExternalAbort0 = 0x8,
77 Domain0 = 0x9,
78 SynchronousExternalAbort1 = 0xa,
79 Domain1 = 0xb,
80 TranslationTableWalkExtAbt0 = 0xc,
81 Permission0 = 0xd,
82 TranslationTableWalkExtAbt1 = 0xe,
83 Permission1 = 0xf,
84 AsynchronousExternalAbort = 0x16,
85 MemoryAccessAsynchronousParityError = 0x18,
86 MemoryAccessSynchronousParityError = 0x19,
87 TranslationTableWalkPrtyErr0 = 0x1c,
88 TranslationTableWalkPrtyErr1 = 0x1e,
89 };
90
91 struct FaultVals
92 {
93 const FaultName name;
94 const FaultOffset offset;
95 const OperatingMode nextMode;
96 const uint8_t armPcOffset;

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204};
205
206class DataAbort : public AbortFault<DataAbort>
207{
208 public:
209 static const MiscRegIndex FsrIndex = MISCREG_DFSR;
210 static const MiscRegIndex FarIndex = MISCREG_DFAR;
211
212 DataAbort(Addr _addr, uint8_t _domain, bool _write, uint8_t _status) :
213 AbortFault<DataAbort>(_addr, _write, _domain, _status)
214 {}
215};
216
217class Interrupt : public ArmFaultVals<Interrupt> {};
218class FastInterrupt : public ArmFaultVals<FastInterrupt> {};
219
220
221} // ArmISA namespace
222
223#endif // __ARM_FAULTS_HH__