faults.cc (8303:5a95f1d2494e) | faults.cc (8314:13ac7b9939ef) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 205 unchanged lines hidden (view full) --- 214 FSR fsr = 0; 215 fsr.fsLow = bits(status, 3, 0); 216 fsr.fsHigh = bits(status, 4); 217 fsr.domain = domain; 218 fsr.wnr = (write ? 1 : 0); 219 fsr.ext = 0; 220 tc->setMiscReg(T::FsrIndex, fsr); 221 tc->setMiscReg(T::FarIndex, faultAddr); | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 205 unchanged lines hidden (view full) --- 214 FSR fsr = 0; 215 fsr.fsLow = bits(status, 3, 0); 216 fsr.fsHigh = bits(status, 4); 217 fsr.domain = domain; 218 fsr.wnr = (write ? 1 : 0); 219 fsr.ext = 0; 220 tc->setMiscReg(T::FsrIndex, fsr); 221 tc->setMiscReg(T::FarIndex, faultAddr); |
222 223 DPRINTF(Faults, "Abort Fault fsr=%#x faultAddr=%#x\n", fsr, faultAddr); |
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222} 223 224void 225FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) { 226 DPRINTF(Faults, "Invoking FlushPipe Fault\n"); 227 228 // Set the PC to the next instruction of the faulting instruction. 229 // Net effect is simply squashing all instructions behind and --- 26 unchanged lines hidden --- | 224} 225 226void 227FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) { 228 DPRINTF(Faults, "Invoking FlushPipe Fault\n"); 229 230 // Set the PC to the next instruction of the faulting instruction. 231 // Net effect is simply squashing all instructions behind and --- 26 unchanged lines hidden --- |