faults.cc (8302:9f23d01421de) | faults.cc (8303:5a95f1d2494e) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 92 unchanged lines hidden (view full) --- 101ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst) 102{ 103 // ARM ARM B1.6.3 104 FaultBase::invoke(tc); 105 countStat()++; 106 107 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR); 108 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 92 unchanged lines hidden (view full) --- 101ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst) 102{ 103 // ARM ARM B1.6.3 104 FaultBase::invoke(tc); 105 countStat()++; 106 107 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR); 108 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); |
109 CPSR saved_cpsr = tc->readMiscReg(MISCREG_CPSR) | 110 tc->readIntReg(INTREG_CONDCODES_F) | 111 tc->readIntReg(INTREG_CONDCODES_GE); | 109 CPSR saved_cpsr = tc->readMiscReg(MISCREG_CPSR); 110 saved_cpsr.nz = tc->readIntReg(INTREG_CONDCODES_NZ); 111 saved_cpsr.c = tc->readIntReg(INTREG_CONDCODES_C); 112 saved_cpsr.v = tc->readIntReg(INTREG_CONDCODES_V); 113 saved_cpsr.ge = tc->readIntReg(INTREG_CONDCODES_GE); 114 |
112 Addr curPc M5_VAR_USED = tc->pcState().pc(); 113 ITSTATE it = tc->pcState().itstate(); 114 saved_cpsr.it2 = it.top6; 115 saved_cpsr.it1 = it.bottom2; 116 117 cpsr.mode = nextMode(); 118 cpsr.it1 = cpsr.it2 = 0; 119 cpsr.j = 0; --- 133 unchanged lines hidden --- | 115 Addr curPc M5_VAR_USED = tc->pcState().pc(); 116 ITSTATE it = tc->pcState().itstate(); 117 saved_cpsr.it2 = it.top6; 118 saved_cpsr.it1 = it.bottom2; 119 120 cpsr.mode = nextMode(); 121 cpsr.it1 = cpsr.it2 = 0; 122 cpsr.j = 0; --- 133 unchanged lines hidden --- |