faults.cc (7189:28998288c48b) | faults.cc (7197:21b9790c446d) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 146 unchanged lines hidden (view full) --- 155 machInst, machInst.opcode, inst2string(machInst)); 156 } else { 157 panic("Attempted to execute unimplemented instruction '%s' " 158 "(inst 0x%08x, opcode 0x%x, binary:%s)", 159 mnemonic, machInst, machInst.opcode, inst2string(machInst)); 160 } 161} 162 | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 146 unchanged lines hidden (view full) --- 155 machInst, machInst.opcode, inst2string(machInst)); 156 } else { 157 panic("Attempted to execute unimplemented instruction '%s' " 158 "(inst 0x%08x, opcode 0x%x, binary:%s)", 159 mnemonic, machInst, machInst.opcode, inst2string(machInst)); 160 } 161} 162 |
163void 164SupervisorCall::invoke(ThreadContext *tc) 165{ 166 // As of now, there isn't a 32 bit thumb version of this instruction. 167 assert(!machInst.bigThumb); 168 uint32_t callNum; 169 if (machInst.thumb) { 170 callNum = bits(machInst, 7, 0); 171 } else { 172 callNum = bits(machInst, 23, 0); 173 } 174 if (callNum == 0) { 175 callNum = tc->readIntReg(INTREG_R7); 176 } 177 tc->syscall(callNum); 178 179 // Advance the PC since that won't happen automatically. 180 tc->setPC(tc->readNextPC()); 181 tc->setNextPC(tc->readNextNPC()); 182} 183 |
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163#endif // FULL_SYSTEM 164 165// return via SUBS pc, lr, xxx; rfe, movs, ldm 166 167 168 169} // namespace ArmISA 170 | 184#endif // FULL_SYSTEM 185 186// return via SUBS pc, lr, xxx; rfe, movs, ldm 187 188 189 190} // namespace ArmISA 191 |