faults.cc (12299:c54efdd48952) faults.cc (12398:5c48d7e08ba0)
1/*
2 * Copyright (c) 2010, 2012-2014, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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477 ITSTATE it = tc->pcState().itstate();
478 saved_cpsr.it2 = it.top6;
479 saved_cpsr.it1 = it.bottom2;
480
481 // if we have a valid instruction then use it to annotate this fault with
482 // extra information. This is used to generate the correct fault syndrome
483 // information
484 if (inst) {
1/*
2 * Copyright (c) 2010, 2012-2014, 2016-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 468 unchanged lines hidden (view full) ---

477 ITSTATE it = tc->pcState().itstate();
478 saved_cpsr.it2 = it.top6;
479 saved_cpsr.it1 = it.bottom2;
480
481 // if we have a valid instruction then use it to annotate this fault with
482 // extra information. This is used to generate the correct fault syndrome
483 // information
484 if (inst) {
485 ArmStaticInst *armInst = reinterpret_cast<ArmStaticInst *>(inst.get());
485 ArmStaticInst *armInst = static_cast<ArmStaticInst *>(inst.get());
486 armInst->annotateFault(this);
487 }
488
489 if (have_security && routeToMonitor(tc))
490 cpsr.mode = MODE_MON;
491 else if (have_virtualization && routeToHyp(tc))
492 cpsr.mode = MODE_HYP;
493 else

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667 pc.aarch64(!cpsr.width);
668 pc.nextAArch64(!cpsr.width);
669 tc->pcState(pc);
670
671 // If we have a valid instruction then use it to annotate this fault with
672 // extra information. This is used to generate the correct fault syndrome
673 // information
674 if (inst)
486 armInst->annotateFault(this);
487 }
488
489 if (have_security && routeToMonitor(tc))
490 cpsr.mode = MODE_MON;
491 else if (have_virtualization && routeToHyp(tc))
492 cpsr.mode = MODE_HYP;
493 else

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667 pc.aarch64(!cpsr.width);
668 pc.nextAArch64(!cpsr.width);
669 tc->pcState(pc);
670
671 // If we have a valid instruction then use it to annotate this fault with
672 // extra information. This is used to generate the correct fault syndrome
673 // information
674 if (inst)
675 reinterpret_cast<ArmStaticInst *>(inst.get())->annotateFault(this);
675 static_cast<ArmStaticInst *>(inst.get())->annotateFault(this);
676 // Save exception syndrome
677 if ((nextMode() != MODE_IRQ) && (nextMode() != MODE_FIQ))
678 setSyndrome(tc, getSyndromeReg64());
679}
680
681void
682Reset::invoke(ThreadContext *tc, const StaticInstPtr &inst)
683{

--- 780 unchanged lines hidden --- 		676 // Save exception syndrome
677 if ((nextMode() != MODE_IRQ) && (nextMode() != MODE_FIQ))
678 setSyndrome(tc, getSyndromeReg64());
679}
680
681void
682Reset::invoke(ThreadContext *tc, const StaticInstPtr &inst)
683{

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