faults.cc (10037:5cac77888310) faults.cc (10338:8bee5f4edb92)
1/*
1/*
2 * Copyright (c) 2010, 2012-2013 ARM Limited
2 * Copyright (c) 2010, 2012-2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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461 FaultBase::invoke(tc);
462 if (!FullSystem)
463 return;
464 countStat()++;
465
466 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR);
467 SCR scr = tc->readMiscReg(MISCREG_SCR);
468 CPSR saved_cpsr = tc->readMiscReg(MISCREG_CPSR);
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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461 FaultBase::invoke(tc);
462 if (!FullSystem)
463 return;
464 countStat()++;
465
466 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR);
467 SCR scr = tc->readMiscReg(MISCREG_SCR);
468 CPSR saved_cpsr = tc->readMiscReg(MISCREG_CPSR);
469 saved_cpsr.nz = tc->readIntReg(INTREG_CONDCODES_NZ);
470 saved_cpsr.c = tc->readIntReg(INTREG_CONDCODES_C);
471 saved_cpsr.v = tc->readIntReg(INTREG_CONDCODES_V);
472 saved_cpsr.ge = tc->readIntReg(INTREG_CONDCODES_GE);
469 saved_cpsr.nz = tc->readCCReg(CCREG_NZ);
470 saved_cpsr.c = tc->readCCReg(CCREG_C);
471 saved_cpsr.v = tc->readCCReg(CCREG_V);
472 saved_cpsr.ge = tc->readCCReg(CCREG_GE);
473
474 Addr curPc M5_VAR_USED = tc->pcState().pc();
475 ITSTATE it = tc->pcState().itstate();
476 saved_cpsr.it2 = it.top6;
477 saved_cpsr.it1 = it.bottom2;
478
479 // if we have a valid instruction then use it to annotate this fault with
480 // extra information. This is used to generate the correct fault syndrome

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610 default:
611 panic("Invalid target exception level");
612 break;
613 }
614
615 // Save process state into SPSR_ELx
616 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
617 CPSR spsr = cpsr;
473
474 Addr curPc M5_VAR_USED = tc->pcState().pc();
475 ITSTATE it = tc->pcState().itstate();
476 saved_cpsr.it2 = it.top6;
477 saved_cpsr.it1 = it.bottom2;
478
479 // if we have a valid instruction then use it to annotate this fault with
480 // extra information. This is used to generate the correct fault syndrome

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610 default:
611 panic("Invalid target exception level");
612 break;
613 }
614
615 // Save process state into SPSR_ELx
616 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
617 CPSR spsr = cpsr;
618 spsr.nz = tc->readIntReg(INTREG_CONDCODES_NZ);
619 spsr.c = tc->readIntReg(INTREG_CONDCODES_C);
620 spsr.v = tc->readIntReg(INTREG_CONDCODES_V);
618 spsr.nz = tc->readCCReg(CCREG_NZ);
619 spsr.c = tc->readCCReg(CCREG_C);
620 spsr.v = tc->readCCReg(CCREG_V);
621 if (from64) {
622 // Force some bitfields to 0
623 spsr.q = 0;
624 spsr.it1 = 0;
625 spsr.j = 0;
626 spsr.res0_23_22 = 0;
627 spsr.ge = 0;
628 spsr.it2 = 0;
629 spsr.t = 0;
630 } else {
621 if (from64) {
622 // Force some bitfields to 0
623 spsr.q = 0;
624 spsr.it1 = 0;
625 spsr.j = 0;
626 spsr.res0_23_22 = 0;
627 spsr.ge = 0;
628 spsr.it2 = 0;
629 spsr.t = 0;
630 } else {
631 spsr.ge = tc->readIntReg(INTREG_CONDCODES_GE);
631 spsr.ge = tc->readCCReg(CCREG_GE);
632 ITSTATE it = tc->pcState().itstate();
633 spsr.it2 = it.top6;
634 spsr.it1 = it.bottom2;
635 // Force some bitfields to 0
636 spsr.res0_23_22 = 0;
637 spsr.ss = 0;
638 }
639 tc->setMiscReg(spsr_idx, spsr);

--- 801 unchanged lines hidden --- 		632 ITSTATE it = tc->pcState().itstate();
633 spsr.it2 = it.top6;
634 spsr.it1 = it.bottom2;
635 // Force some bitfields to 0
636 spsr.res0_23_22 = 0;
637 spsr.ss = 0;
638 }
639 tc->setMiscReg(spsr_idx, spsr);

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