1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 39 unchanged lines hidden (view full) --- 48#include "cpu/thread_context.hh" 49#include "debug/Faults.hh" 50#include "sim/full_system.hh" 51 52namespace ArmISA 53{ 54 55template<> ArmFault::FaultVals ArmFaultVals<Reset>::vals = |
56{"reset", 0x00, MODE_SVC, 0, 0, true, true, FaultStat()}; |
57 58template<> ArmFault::FaultVals ArmFaultVals<UndefinedInstruction>::vals = |
59{"Undefined Instruction", 0x04, MODE_UNDEFINED, 4 ,2, false, false, 60 FaultStat()} ; |
61 62template<> ArmFault::FaultVals ArmFaultVals<SupervisorCall>::vals = |
63{"Supervisor Call", 0x08, MODE_SVC, 4, 2, false, false, FaultStat()}; |
64 65template<> ArmFault::FaultVals ArmFaultVals<PrefetchAbort>::vals = |
66{"Prefetch Abort", 0x0C, MODE_ABORT, 4, 4, true, false, FaultStat()}; |
67 68template<> ArmFault::FaultVals ArmFaultVals<DataAbort>::vals = |
69{"Data Abort", 0x10, MODE_ABORT, 8, 8, true, false, FaultStat()}; |
70 71template<> ArmFault::FaultVals ArmFaultVals<Interrupt>::vals = |
72{"IRQ", 0x18, MODE_IRQ, 4, 4, true, false, FaultStat()}; |
73 74template<> ArmFault::FaultVals ArmFaultVals<FastInterrupt>::vals = |
75{"FIQ", 0x1C, MODE_FIQ, 4, 4, true, true, FaultStat()}; |
76 77template<> ArmFault::FaultVals ArmFaultVals<FlushPipe>::vals = |
78{"Pipe Flush", 0x00, MODE_SVC, 0, 0, true, true, FaultStat()}; // dummy values |
79 80template<> ArmFault::FaultVals ArmFaultVals<ArmSev>::vals = |
81{"ArmSev Flush", 0x00, MODE_SVC, 0, 0, true, true, FaultStat()}; // dummy values |
82Addr 83ArmFault::getVector(ThreadContext *tc) 84{ 85 // ARM ARM B1-3 86 87 SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR); 88 89 // panic if SCTLR.VE because I have no idea what to do with vectored --- 181 unchanged lines hidden --- |